Electronics Forum: large area array (Page 6 of 41)

Solder ball specifications?

Electronics Forum | Thu Jan 24 19:57:40 EST 2002 | davef

Are there formalized standards for the properties of solder balls? No Get IPC-7095 �Design & Assembly Process Implementation for BGA's�. General comments about array package solder balls are: * Ceramic packages use harder solder, like 90/10. * Pla

Re: Popcorning BGA in wave-soldering

Electronics Forum | Tue Oct 19 22:27:29 EDT 1999 | Stu Leech

We have just completed some studies of with ABPAC, who is a large subcontract assembler of plastic ball grid arrays. BT laminates can pick-up appreciable moisture in just two hours. They are using TVP demoisturizing, our product (I apologize for the

Set Command Variables

Electronics Forum | Sat Feb 12 08:13:48 EST 2005 | pemnut

I have seen BEC holes drilled wrong also. On a couple of products We run, We insert a Pem Nut. The insertion hole is too large for BEC to read. So We have the board house drill a small hole for each array, circuit. If these smaller holes are drilled

Land Grid Array soldering

Electronics Forum | Wed Apr 13 10:05:58 EDT 2016 | donnie15

I am working on soldering an Large LGA module to a PCB and am having some issues with opens due to variation in the board flatness. I have tried adding more paste but get shorts and excess flux as I get above a 7 mil stencil. I have tried adding sol

PCBA Time Estimation Formula

Electronics Forum | Wed Feb 19 16:26:35 EST 2020 | stephendo

IPC tried to develop a standard to compare machine throughputs. The machine placement times are usually based on very few components with optimum feeder placement and a very large array of placements. Real life boards are rarely like that. Once I wor

SAC BGA in Pb Process

Electronics Forum | Mon Mar 29 11:48:43 EDT 2010 | davef

SAC BGA In A Sn/Pb Reflow Process Conclusion: Area array components (ball grid arrays, chip scale packages, flip chip packages) with Pbfree solder sphere alloys should not be reflowed using a tin/lead reflow profile due to the resulting non-uniform s

Why is NC the prefer process for BGA mounting? why not WS?

Electronics Forum | Tue Aug 21 21:39:19 EDT 2001 | davef

1) why is No-clean (NC) the preferred process, for BGA mounting by SMT? Probably the same reason NC is the preferred process for mounting non-area array SMT components. 2) why is water-soluble (WS) not a hot choice? There�s not reason not to use

RoHS Board Delamination

Electronics Forum | Tue Oct 31 07:50:22 EST 2006 | markb

SWAG - Was your experiment on the board with the large ground plane? The board we are seeing issues with also has a large ground plane (approx 50% of PCB), and 90% of the delamination occurs in that area. The delamination is about the size of a sil

QFN PCB Pad no Drain Hole

Electronics Forum | Fri May 31 18:00:55 EDT 2013 | hegemon

With regards to first picture.(Large themal vias) I would attempt to measure the area of the ground pad, less the area of the "drain" holes or Thermal Vias. From that result I would reduce the aperture to account for about 50% coverage of that remai

PCB copper to disipate heat

Electronics Forum | Thu May 02 20:56:25 EDT 2002 | clunier

I remember reading a magazine article a few years ago that discused using the copper area of a pcb to transfer heat away from large SMT devices. Does anyone know of this article or something similar that I can obtain. The article covered copper area,


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