Electronics Forum | Wed Feb 17 13:02:03 EST 2016 | comatose
The layer count itself isn't going to be what drives yields. What is the trace/space? How much annular ring for vias did you give them to play with? Class 2 or class 3? What's the worst hole aspect ratio? Controlled impedance? The closer you run to y
Electronics Forum | Mon Jul 05 02:32:14 EDT 1999 | Vinesh Gandhi
Dear All, We are a medium sized Electronic manufacturing company manufacturing computer motherboards and Telecommunication products. We have a big debate going on within our company regarding the defect rate measurement technique. At present we
Electronics Forum | Tue Jan 02 16:49:14 EST 2007 | dyoungquist
I am looking for data on the yield of printed circuit board assemblies so that I can judge if our SMT line is performing up to typical industry standards. Following I will describe the details of the assembly and what our yield has been. Each board
Electronics Forum | Tue Aug 28 12:05:42 EDT 2001 | mparker
The advantage of DPMO is that the numbers used are PPM, (Part Per Million), rather than percentage. Percentage can distort, depending on volume. For instance, 100 units processed, 25 defects found = 75 percent yield. 4 units processed, 1 defect found
Electronics Forum | Wed Jul 31 08:23:49 EDT 2002 | mcm4me
221C). 2D vision can very effectively detect % pad coverage, I use it on my DEK and this customer has an MPM which I also believe to be capable. Here is another fact, when the customer uses Brand X solder paste the defects due to what they call pad
Electronics Forum | Fri Nov 13 06:56:37 EST 2009 | CL
Good Morning, The customer is looking for void free connections. They had never specified an acceptable percentage. We are reacting to the test yield. Our yield has averaged 50%. We do not test the product so we rely on feeback from the customer. Us
Electronics Forum | Mon Aug 27 08:29:28 EDT 2012 | cobham1
The process is currently being performed by hand. I am trying to automate the process by switching to pick and place equipment and using AOI. Problem number one is getting my customer to sign off on switching from hand assembly to machine assembly.
Electronics Forum | Thu Sep 06 11:24:56 EDT 2018 | davef
pdf "BGA Stencil design guideline for avoid bridge" As you would expect, Google found 40,000+ results in less than a second One of my favorites was Power Point Presentation by Greg Smith [gsmithATfctassembly.com] at FCT Assembly: "Improve SMT Assem
Electronics Forum | Thu Jun 04 12:26:30 EDT 1998 | Dave F
| If you could measure and chart 3 variables in my process, what would they be? | The boards that I produce are on panels that are 12up and 2x4 up. All boards are single sided paper base w/o plated thru holes. They are on scored panels that measure
Electronics Forum | Tue Mar 13 11:13:05 EST 2001 | blair
Hi: We are about to build a batch of highly critical control cards with 5 BGA on them. We just recently had a significantly bad yield at our subcontractor in the San Jose area. We feel it is in the reflow profile that was used but are not 100% sur
