Electronics Forum | Tue Jul 08 20:43:03 EDT 2003 | davef
AlCapone: We have an understanding similar to yours, but slightly different. * At 230*C gold dissolves in to solder at the following rate: 63/37: 197 uinch/sec [5 um/sec]. So for a typical ENIG solderability protection, the gold is gone in about a s
Electronics Forum | Wed Aug 20 17:25:02 EDT 2003 | Dean
Coincidence? I just finished a glass calibration this morning on a P&P machine. Excellent tool for precision calibration. Takes the guess work out of the process. I would disagree with Cal's assessment. His calibration methods may work to suit h
Electronics Forum | Wed Aug 27 09:23:03 EDT 2003 | Darrow Gervais
I have an SMT application in which I would like to eliminate the soldermaks layer. I am working on a VERY tightly packed board so I cannot bury the traces and connected them to the pads with vias. I was thinking about selectively plating the expose
Electronics Forum | Wed Aug 27 09:45:22 EDT 2003 | caldon
My initial thought (Quick and not to in depth)made me think of the solder joint integrity. I would fear solder contamination if the metal making up the plating would leach (or its elements) into the solder joint. I strongly suggest if you were to go
Electronics Forum | Wed Sep 10 02:47:49 EDT 2003 | Dennis O'Donnelll
This is a problem of contamination in the plating bath. Most prominent with white tin and some gold over nickel plating processes. Rather than argue with your vendor over the issue, and to avoid future recurring problems, I use either HASL or elect
Electronics Forum | Thu Jan 08 14:33:50 EST 2004 | dwzeek
Toe fillets are not required per IPC. Toe fillets could be used as a process indicator, if you desire; I would not. Gull wing leads are typically cut off on the ends when manufactured; this exposes the non-plated material in the lead, typically coppe
Electronics Forum | Wed Mar 31 13:05:46 EST 2004 | JoeH
Anyone used this package? It's Cygnal PN C8051F300. The part has bottom side, flat terminations (like a BGA without the balls). There is metalization on the sides of the package but it's not plated (bare copper). Metalization on the bottom is pla
Electronics Forum | Sun Apr 04 14:59:38 EDT 2004 | davef
When you say, "you can see the plating of each lead embedded in the broken solder joint", we do not get the sense of a well soldered connection. * We don't expect to see [or make the distinction] of the plating from the connector in the solder. We
Electronics Forum | Wed Jul 07 11:49:34 EDT 2004 | Svensen
Curiously... Shelf-life of the plating alternatives has been mentioned several times as a potential issue in these discussions. Tell me is there a market for a simple plastic packaging which could extend shelf life (and hence solderability) of these
Electronics Forum | Thu Sep 02 15:51:15 EDT 2004 | cburress
All: IPC does not directly state any criteria for physical characteristics of what a filled via should look like when embedded within a surface mount component's pad. I am using several of these in my design, and have received PCBs that exhibi