Technical Library: cap (Page 7 of 10)

Electrical Performance of an Organic, Z-interconnect, Flip-Chip Substrate

Technical Library | 2007-10-25 18:39:07.0

More and more substrate designs require signals paths that can handle multi-gigahertz frequencies [1-3]. The challenges for organic substrates, in meeting these electrical requirements, include using high-speed, low-loss materials, manufacturing precise structures and making a reliable finished product. A new substrate technology is presented that addresses these challenges.

i3 Electronics

Manufacture and Characterization of a Novel Flip-Chip Package Z-interconnect Stack-up with RF Structures

Technical Library | 2008-02-26 15:02:19.0

More and more chip packages need multi-GHz RF structures to meet their performance targets. The ideal chip package needs to combine RF features with Digital features for these applications. They drive low-loss, controlled impedance transmission lines, flexibility in assigned signal and power layers, and clearances of various shapes in power layers. Building these features in a chip package is difficult without making the stack-up very thick or compromising the reliability of the product. In the present paper, we have designed and built a flip-chip package test vehicle (TV) to make new RF structures, using Z-axis interconnection (Zinterconnect) building blocks.

i3 Electronics

Criminal Prosecution - Who can be held liable for the sale of counterfeit parts?

Technical Library | 2011-09-26 13:53:30.0

On September 14, 2010, the late Shannon Wren, owner of VisionTech Components ("VisionTech"), and Stephanie McCloskey, VisionTech's Administrative Manager, were arrested during the execution of search and seizure warrants issued against the pair by the United States government after evidence connected them to the sale of counterfeit parts to the U.S. Navy, defense contractors and others. A ten-count indictment charged McCloskey with conspiracy, aiding and abetting in violation of Title 18 United States Code, Sections 371 and 2; trafficking in counterfeit goods, in violation of Title 18 United States Code, Section 2320; and mail fraud, in violation of Title 18 United States Code, Section 1341. McCloskey pled guilty to conspiracy and aiding and abetting for her role in the scheme.

ERAI Inc.

Stencil Design Guidelines for Electronics Assembly Technologies.

Technical Library | 2014-03-13 15:25:01.0

A student competition paper at Budapest University of Technology And Economics, Department of Electronics Technology gives background, covers stencil design and discusses stencils intended for pin in paste application. The stencil applied for depositing the solder paste is a thin, 75–200 µm thick metal foil, on which apertures are formed according to the solder pads on the printed circuit board. Stencil printing provides a fast, mass solder paste deposition process; relatively expensive, appropriate and recommended for mass production.

Budapest University of Technology and Economics

Environmentally sound: Aqueous cleaning with minimum water consumption

Technical Library | 2017-01-23 21:12:01.0

"Water is not a problem of the future, but a key issue of our time for businesses: In the future, urgent water risks will increase in many areas of the world. A growing population, a changing consumer behavior and climate change will have an immediate impact on the availability and quality of water and thus build further pressure on governments, businesses and societies." (Quote from the summary of the 2014 WWF study "The imported risk. Germany's water risk in the age of globalization.")

Kolb Cleaning Technology USA LLC

Common Process Defect Identification of QFN Packages

Technical Library | 2019-07-23 22:33:47.0

The Quad Flat Pack No Leads (QFN) style of leadless packaging [also known as a Land Grid Array (LGA)] is rapidly increasing in us e for wireless, automotive, telecom and many other areas becaus e of its low cost, low stand-off height and excellent thermal and electri cal properties. With the implementation of any new package type, there is always a learning curve for its use in design and processing as well as for the Process and Quality Engineers who have to get to grips with the challenges that these packages bring. Therefore, this paper will provide examples of the common process defects that can be seen with QFNs /LGAs when using optical and x-ray inspection as part of manufacturing quality control. Results of trials conducted on four PCB finishes and using vapour phase and convection reflow will be discussed.

Nordson DAGE

Soft, Wireless Periocular Wearable Electronics For Real-Time Detection Of Eye Vergence In A Virtual Reality Toward Mobile Eye Therapies

Technical Library | 2020-07-22 19:24:33.0

Recent advancements in electronic packaging and image processing techniques have opened the possibility for optics-based portable eye tracking approaches, but technical and safety hurdles limit safe implementation toward wearable applications. Here, we introduce a fully wearable, wireless soft electronic system that offers a portable, highly sensitive tracking of eye movements (vergence) via the combination of skin-conformal sensors and a virtual reality system. Advancement of material processing and printing technologies based on aerosol jet printing enables reliable manufacturing of skin-like sensors, while the flexible hybrid circuit based on elastomer and chip integration allows comfortable integration with a user's head. Analytical and computational study of a data classification algorithm provides a highly accurate tool for real-time detection and classification of ocular motions. In vivo demonstration with 14 human subjects captures the potential of the wearable electronics as a portable therapy system, whose minimized form factor facilitates seamless interplay with traditional wearable hardware.

Georgia Institute of Technology

Inclusion Voiding in Gull Wing Solder Joints

Technical Library | 2012-08-30 21:24:29.0

This paper provides definitions of the different voiding types encountered in Gull Wing solder joint geometries. It further provides corresponding reliability data that support some level of inclusion voiding in these solder joints and identifies the final criteria being applied for certain IBM Server applications. Such acceptance criteria can be applied using various available x-ray inspection techniques on a production or sample basis. The bulk of supporting data to date has been gathered through RoHS server exempt SnPb eutectic soldering operations but it is expected to provide a reasonable baseline for pending Pb-free solder applications.

IBM Corporation

iNEMI HFR-Free PCB Materials Team Project: An Investigation to Identify Technology Limitations Involved in Transitioning to HFR-Free PCB Materials

Technical Library | 2013-05-16 15:52:00.0

In response to a growing concern within the Electronic Industry to the transition to Halogen-Free laminates (HFR-Free) within the Client Market space (Desktop and Notebook computers) iNEMI initiated a HFR-Free Leadership Workgroup to evaluate the readiness of the Industry to make this transition. The HFR-Free Leadership WG concluded that the electronic industry is ready for the transition and that the key electrical and thermo-mechanical properties of the new HFR-Free laminates can meet the required criteria. The HFR-Free Leadership WG verified that the laminate suppliers can meet the capacity demands for these new HFR-Free laminates and developed a "Test Suite Methodology" (TSM) that can facilitate the comparison and choice of the right laminate to replace brominated FR4 in the Client space... First published in the 2012 IPC APEX EXPO technical conference proceedings.

Intel Corporation

Parallel SmartSpice: Fast and Accurate Circuit Simulation Finally Available

Technical Library | 1999-07-20 10:35:30.0

Circuit simulation is a necessary everyday tool to circuit designers who need to constantly verify and debug their circuits during the design process. As engineers face larger, more complex designs and tighter project schedules, fast SPICE simulation with no loss in accuracy has become a necessity. Simulation indeed accounts for a large portion of the time spent in the design and optimization of a new circuit...

Silvaco


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