Electronics Forum: copper foil reflow (Page 7 of 50)

How much is the exposure tolerance for PCB auto dry film?

Electronics Forum | Sat Sep 29 04:55:49 EDT 2018 | sanneyyu

for pattern position with +/-2mil tolerance, pattern width may minus 0.5mil max with the traditional auto exposure.etching tolerance determined by the base copper foil.

Assemby of flexible printed circuits

Electronics Forum | Wed May 16 15:40:56 EDT 2012 | davef

Here's some notes from a Bob Willis presentation Assembly of Flexible Circuits with Lead-Free Solder Alloy [Bob Willis leadfreesoldering.com] * Flexible Circuit Construction ** Base Material - 0.05mm Copper 18/18 um ESPANEX from Holders Technologies

Recommendations on Solder Scavenging Systems

Electronics Forum | Fri May 01 08:15:36 EDT 2009 | davef

Scavenging Methods [Improve Solder Scavenging of Large Area-array Sites, SMT, Laurence Harvilchuck, process research engineer, Unovis Solutions, harvilch@unovis-solutions.com] Two common methods exist for scavenging residual solder on the site for s


Electronics Forum | Wed Aug 05 20:48:50 EDT 1998 | Ron Costa

I'm currently running a double sided paste smt board loaded with 0603's, on the secondary side. Many of the 0603 devices tombstone during reflow if the parts are not perfectly centered on the pads. Is this caused by the .008 foil thickness? Has anyon

Differentdefect on circuit board surface

Electronics Forum | Fri Jul 10 07:34:00 EDT 2020 | elijah

From the poor bonding strength of the board, the surface quality problems of the board are divided into: 1. The cleanliness of the board surface; 2. The problem of micro graphite (or surface energy) on the surface. PCB circuit board proofing Youke bo

Soldered Brass Tape

Electronics Forum | Mon Apr 18 12:28:33 EDT 2005 | davef

We've never heard of it either. Stained glass widow people use varous types of copper and brass tape / foil in their work. A widely used suppler of this tape is Venture [ http://www.venturetape.com ]. They may be able to help. We're not sure how

THT connector solder thieves

Electronics Forum | Thu Feb 13 10:38:51 EST 2003 | davef

Given that you are bridging front to back, contast the situation with the thiefs used to prevent bridging when wave soldering SOIC. If this is reasonable, the thiefs should be located behind the trailing connector pins. You can prove-out this [and

BGA attach eval.

Electronics Forum | Tue Apr 01 11:50:08 EST 2003 | rdr

Dave, thanks for the info. This sounds like it would verify the presence of an open. We have verified that these balls are open and I am trying to figure out if we are fracturing or not wetting. causing these opens. I would use the die method on ne

Thermal relief question

Electronics Forum | Wed Jun 08 17:35:04 EDT 2016 | slthomas

We all know that whenever possible, we want thermal relief between the barrel/pad and the copper foil to make it easier to properly solder that through hole connector. My question is, assuming there is no connection from the barrel to a copper layer

BCC Technology --- Placement, Rework, Reflow

Electronics Forum | Fri Aug 09 11:59:31 EDT 2002 | bcceng

Tom, I developed a process for applying solder bumps on BCC32 and BCC48 successfully on my previous employer. The quantities were in the thousands a week, the following process is what I was using: Insert BCC's on process carrier (carrier holds 500

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