Electronics Forum | Thu May 23 18:40:48 EDT 2013 | rway
I also agree. Even if it did meet specs, I wouldn't let a joint like this out. Reese
Electronics Forum | Fri Jun 28 14:18:46 EDT 2013 | proceng1
I don't see any requirement for a ferrule on the wire. As long as your insulation clearance is twice the insulation diameter or less and the insulation doesn't interfere with the solder joint, it should pass Class 3.
Electronics Forum | Tue Jan 29 17:11:32 EST 2019 | slthomas
Your product is Class 3, correct? Otherwise, a clearly wetted connection is all you need.
Electronics Forum | Tue Sep 24 01:57:24 EDT 2019 | sara_pcb
HI, What is the method for testing solder-ability of Class 3 PCBs. The PCBs have through hole & SMT Pads. Solder-ability need to be assessed prior to wiring. Kinldy advise
Electronics Forum | Sat Oct 19 08:28:04 EDT 2019 | davef
Hi Davandran ... Butt leads are not intended for high mechanical strength applications. That's why butt leads are not allowed in Class 3 products. If you want to be sure that your butt leaded component stays on the board, just glue it after solderin
Electronics Forum | Fri Jul 14 16:32:55 EDT 2023 | calebcsmt
Does class 2 vs class 3 PCBs effect variance/tolerance in terms of actual positioning of pads/traces? For example, if fiducial is to be at 10mm. What's the tolerance for class 2 vs class 3? [variance allowed] Does panelization have any effect on t
Electronics Forum | Thu Feb 04 21:17:41 EST 1999 | Chris G.
| What allowances are people using out there for components off-pad, we currently use 50% of lead width without breaking trace/component clearances but we have a customer demanding 25% allowance ? | IPC states: 50% off pad for class 1 and 2 25% off
Electronics Forum | Mon Oct 21 08:46:15 EDT 2002 | davef
60% ||||36% of ball area|| >36% ||Class2|| Accept|| Reject ||||45% of ball diameter|| >45% ||||20.25% of ball area|| >20.25% ||Class3|| Accept|| Reject ||||30% of ball diameter|| >30% ||||09% of ball area|| >09% II. Missing Ball: This is prohi
Electronics Forum | Wed Feb 17 13:02:03 EST 2016 | comatose
The layer count itself isn't going to be what drives yields. What is the trace/space? How much annular ring for vias did you give them to play with? Class 2 or class 3? What's the worst hole aspect ratio? Controlled impedance? The closer you run to y
Electronics Forum | Tue Jun 04 17:10:13 EDT 2002 | davef
First, �flash gold� is very loose language. It means different things to different people. �Flash� gold is a thin coat of immersion gold. Imm gold self-limits at ~0.3um[12uin]. And fabs put-down �flash� prior to electroplating thicker gold for wi
