Electronics Forum | Wed Sep 03 00:25:24 EDT 2003 | severs
I was recently approached by a leading industry consultancy group and was asked, ..."if there have been any major advances or developments in the field of electronics production, what are they?" It got me to thinking, we've certainly witnessed some
Electronics Forum | Thu Jul 20 23:41:55 EDT 2017 | heros_electronics
Below is an email that I copy and pasted from my customer's engineer about his concerns with the issue of the chips not reflowing (which is why I was asking about X-ray the chips to make sure they reflowed): Can you let me know your thoughts on his
Electronics Forum | Tue Feb 19 13:37:48 EST 2002 | PeteC
When evaluating AOI you must first define what type of inspections you want the system to perform, pre-solder or post-solder. What separates many mfgs. of these systems is how effective they are at finding post solder defects. This is where camera re
Electronics Forum | Mon Nov 09 07:21:02 EST 2009 | CL
Good Morning, I have seen many posts regarding BGA voiding being excessive and what can be done to better the condition. I have a customer that has an assembly that we have had a diufficult time with. We have spent a lot of time debugging the proces
Electronics Forum | Thu Apr 28 01:30:54 EDT 2022 | sophyluo1985
Achieving high reliability and high efficiency in SMT process (Surface Mount Technology) assembly has always been the goal of electronics manufacturers expecting consistency. It depends on the optimization of every detail of the whole process. For SM
Electronics Forum | Thu Sep 24 18:57:03 EDT 2009 | davef
From "siliconfareast.com": Basic Die Cracking FA Flow 1) Failure Information/Device and Lot History Review. Understand the customer's description of the failure, i.e., the failure mode, where it was encountered, what conditions the sample was subject
Electronics Forum | Tue May 18 16:24:25 EDT 1999 | Scott McKee
| | | | What is the best way to re-ball a BGA? Who has the best system for doing it? | | | | | | | I'm using our SRT rework stuff to reball in house - when necessary. Of course, we only do this for protos and test boards. We use a standard micro-st
Electronics Forum | Thu Apr 10 09:28:14 EDT 2003 | chrissieneale
Thanks for your replies guys, there's some good info there. Dave, answers to your questions: The stencil was initially a big problem as with the Egineering Model's (EM's) and Engineering Qualifing model (EQM's) we kept getting short circuits due to
Electronics Forum | Fri Jun 18 10:24:12 EDT 1999 | John Thorup
| first of all what is the technical term for the small amount of solder on a plated pad. we are getting poor screen printing gasketing on a 20 mil qfp due to this solder not being even or too high in spots and not covering the length of the pads. an
Electronics Forum | Wed Nov 11 10:08:38 EST 1998 | Magnus
| | Hi, | | We are having problem with yield loss due to electrical fail. Further investigation shows that the failure is due to solder bridging under BGA. Has been there any study or experience on how this could occur and what we can do to prevent
