Electronics Forum: defected (Page 8 of 226)

Re: DPM-Rate for SMT pprocess

Electronics Forum | Wed Oct 07 06:19:30 EDT 1998 | Charles Stringer

| | | Does sombbody know what DPM rate a good and reliable SMT assembly line (incl. solder paste print, assembly and feflow soldering) has? | | | DPM is Defects per million, usually measured on components. We run a process consisting of small to medi

Re: DPM-Rate for SMT pprocess

Electronics Forum | Tue Oct 06 15:41:14 EDT 1998 | Mike C

| | Does sombbody know what DPM rate a good and reliable SMT assembly line (incl. solder paste print, assembly and feflow soldering) has? | | DPM is Defects per million, usually measured on components. We run a process consisting of small to medium b

Placement Defect Rate Benchmark

Electronics Forum | Wed Feb 23 16:25:33 EST 2000 | John

We are using a glue and wave solder process for primarily chip components. Our products do not use any fine pitch components. What would an acceptable benchmark for the placement defect rate be? 50 DPMO? 100 DPMO? 200 DPMO? Thanks in advance,

Re: BGA fault types

Electronics Forum | Fri Jun 23 10:09:38 EDT 2000 | Bob Willis

There is a CD ROM which I updated this year on BGA process and defect guide see the SMTNET bookshop or call the SMTA for the Interactive CD ROM which has a defect gallery. Bob Willis

Placement Defect Rate Benchmark

Electronics Forum | Wed Feb 23 16:25:33 EST 2000 | John

We are using a glue and wave solder process for primarily chip components. Our products do not use any fine pitch components. What would an acceptable benchmark for the placement defect rate be? 50 DPMO? 100 DPMO? 200 DPMO? Thanks in advance,

Tombstoning

Electronics Forum | Thu Dec 16 20:16:48 EST 1999 | Henry C. Yao

What are the parameters to be adjusted to prevent this defect. What are the things that I have to look at. I believe that when the components get smaller, occurrence of this defect increases. Also, there is the problem of solder paste condition.

SMT Zero-defect Soldering

Electronics Forum | Mon Nov 29 14:35:03 EST 1999 | Mark D. Milward

We are in the process of researching and gathering information on establishing a zero-defect soldering program. I am sending for an IPC video on the subject. I am particularly interested in getting some direction and hearing from those of you in the

Solder related defects

Electronics Forum | Fri Apr 03 05:25:31 EST 1998 | Donnacha

Hi all, Could someone suggest a web site that contains good representations and pictures of SMT solder related defects?? I need to compare these with some pictures I'm using for a project presentation this week. Thanks, D.

DPMO calc and Overall Manufacturing Index (OMI) calculations

Electronics Forum | Tue Aug 28 13:46:46 EDT 2001 | mparker

To clarify on "Opportunities"- With 1000 components, the opportunities are far greater than 1000. You have 1 opportunity per component for a component defect i.e. bent lead, damaged part, tested bad, etc. You have a second opportunity per component

Minimizing Tombstoning Defects

Electronics Forum | Mon Sep 17 10:09:45 EDT 2001 | martys

What variables that you have tested are sensitive to producing tombstoning defects and what advice can you provide to minimize them?


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