Technical Library | 2018-03-28 14:54:36.0
Six decades of legacy experience makes the specification and production of screens and masks to produce repeatable precision results mostly an exercise in matching engineering needs with known ink and substrate performance to specify screen and stencil characteristics. New types of functional and electronic devices, flex circuits and medical sensors, industrial printing, ever finer circuit pitch, downstream additive manufacturing processes coupled with new substrates and inks that are not optimized for the rheological, mechanical and chemical characteristics for the screen printing process are becoming a customer driven norm. Many of these materials do not work within legacy screen making, curing or press set-up parameters. Many new materials and end uses require new screen specifications.This case study presents a DOE based method to pre-test new materials to categorize ink and substrate rheology, compatibility and printed feature requirement to allow more accurate screen recipes and on-press setting expectations before the project enters the production environment where time and materials are most costly and on-press adjustment methods may be constrained by locked, documented or regulatory processes, equipment limitations and employee experience.
Technical Library | 2018-09-05 21:41:30.0
In recent years, a growing number of electronic devices are being incorporated into automotive and other high reliability end products where the challenge is to make these devices more reliable. The package size of the devices is largely driven by the consumer industry with their sizes getting smaller making it harder to assemble and be reliable at the same time. For automotive and other high reliability electronics product, it is of the utmost priority to secure high reliability because it directly involves human life and safety. Challenges include selecting an appropriate solder alloy and having good reliability of the solder paste flux.
Technical Library | 2021-08-18 01:30:18.0
The interfacing of soft and hard electronics is a key challenge for flexible hybrid electronics. Currently, a multisubstrate approach is employed, where soft and hard devices are fabricated or assembled on separate substrates, and bonded or interfaced using connectors; this hinders the flexibility of the device and is prone to interconnect issues. Here, a single substrate interfacing approach is reported, where soft devices, i.e., sensors, are directly printed on Kapton polyimide substrates that are widely used for fabricating flexible printed circuit boards (FPCBs).
Technical Library | 2020-09-08 16:43:32.0
Atomic layer deposition (ALD) is an ultra-thin film deposition technique that has found many applications owing to its distinct abilities. They include uniform deposition of conformal films with controllable thickness, even on complex three-dimensional surfaces, and can improve the efficiency of electronic devices. This technology has attracted significant interest both for fundamental understanding how the new functional materials can be synthesized by ALD and for numerous practical applications, particularly in advanced nanopatterning for microelectronics, energy storage systems, desalinations, catalysis and medical fields. This review introduces the progress made in ALD, both for computational and experimental methodologies, and provides an outlook of this emerging technology in comparison with other film deposition methods. It discusses experimental approaches and factors that affect the deposition and presents simulation methods, such as molecular dynamics and computational fluid dynamics, which help determine and predict effective ways to optimize ALD processes, hence enabling the reduction in cost, energy waste and adverse environmental impacts. Specific examples are chosen to illustrate the progress in ALD processes and applications that showed a considerable impact on other technologies.
Technical Library | 2021-04-08 00:30:49.0
As the electronic industry moves to lead-free assembly and finer-pitch circuits, widely used printed wiring board (PWB) finish, SnPb HASL, has been replaced with lead-free and coplanar PWB finishes such as OSP, ImAg, ENIG, and ImSn. While SnPb HASL offers excellent corrosion protection of the underlying copper due to its thick coating and inherent corrosion resistance, the lead-free board finishes provide reduced corrosion protection to the underlying copper due to their very thin coating. For ImAg, the coating material itself can also corrode in more aggressive environments. This is an issue for products deployed in environments with high levels of sulfur containing pollutants encountered in the current global market. In those corrosive environments, creep corrosion has been observed and led to product failures in very short service life (1-5 years). Creep corrosion failures within one year of product deployment have also been reported. This has prompted an industry-wide effort to understand creep corrosion
Technical Library | 2012-06-21 23:06:06.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Most high reliability electronic equipment producers continue to manufacture and support tin-lead (SnPb) electronic products despite the increasing trend for design and conversion
Technical Library | 2020-11-19 20:35:26.0
Simultaneously with the first complex electronic circuits, the task of creating effective means of diagnosing and repairing them appeared. In previous decades, specialized programmable stands were used for diagnostics of serial electronic products, as well as various testers and probes for troubleshooting during their operation. But the dramatic increase in the density / cost factor, in parallel with the very rapid modification of electronic products, made programmable stands economically ineffective even in mass production. The use of traditional laboratory equipment (oscilloscopes, multimeters, etc.) requires power supply to the defective modules, which is often impossible and unsafe, since it can lead to failure of the working modules of the module. In addition, the use of this equipment requires documentation and highly qualified personnel. More automated and sophisticated signature analysis systems came to the rescue in solving this problem. A feature of these devices is that they allow you to test digital and analog assemblies without dismantling components and without supplying voltage.
Technical Library | 2016-04-14 13:49:44.0
A system level test, usually built-in test (BIT), determines that one or more subsystems are faulty. These subsystems sent to the depot or factory repair facility, called units under test (UUTs) often pass that test, an event we call No-Fault-Found (NFF). With more-and more electronics monitored by BIT, it is more likely that an intermittent glitch will trigger a call for a maintenance action resulting in NFF. NFFs are often confused with false alarm (FA), cannot duplicate (CNDs)or retest OK (RTOK) events. NFFs at the depot are caused by FAs, CNDs, RTOKs as well as a number of other complications. Attempting to repair NFF scan waste precious resources, compromise confidence in the product, create customer dissatisfaction, and the repair quality remains a mystery. The problem is compounded by previous work showing that most failure indications calling for repair action at the system level are invalid. NFFs can be caused by real failures or may be a result of system level false alarms. Understanding the cause of the problem may help us distinguish between units under test (UUTs) that we can repair and those that we cannot. In calculating the true cost of repair we must account for wasted effort in attempting to repair unrepairable UUTs.This paper will shed some light on this trade-off. Finally, we will explore approaches for dealing with the NFF issue in a cost effective manner.
Technical Library | 2022-08-08 15:06:06.0
Selective soldering has evolved to become a standard production process within the electronics assembly industry, and now accommodates a wide variety of through-hole component formats in numerous applications. Most through-hole components can be easily soldered with the selective soldering process without difficulty however some types of challenging components require additional attention to ensure that optimum quality is maintained. Several high thermal mass components can place demands on the selective soldering process, while the use of specialized solder fixtures, or solder pallets, often places additional thermal demand on the preheating process. Fine-pitch through-hole components and connectors place a different set of demands on the selective soldering process and typically require special attention to lead projection and traverse speed to minimize bridging between adjacent pins. Dual in-line memory module (DIMM) connectors, compact peripheral component interface (cPCI) connectors, coax connectors and other high thermal mass components as well as fine-pitch microconnectors, can present challenges when soldered into backplanes or multilayer printed circuit board assemblies. Adding to this challenge, compact peripheral component interface connectors can present additional solderability issues because of their beryllium copper base metal pins. Key Terms: Selective soldering, drop-jet fluxing, sustained preheating, flux migration, adjacent clearance, lead-to-hole aspect ratio, lead projection, thermal reliefs, gold embrittlement, solderability testing.
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Manufacturer of PCB depaneling and PCB soldering machines since 2005, products include CE approval V-groove PCB depanelizer, PCB router, PCB punching machine, laser depaneling, hot bar soldering machines and soldering robots.
Liwu Industrial Park, Yuanzhou Town, Boluo
Huizhou, China
Phone: +86-138-29839112
