Electronics Forum | Mon Apr 09 06:55:54 EDT 2018 | tsvetan
are there unplugged vias on the BGA pads?
Electronics Forum | Tue Aug 14 10:35:05 EDT 2018 | sarason
Eagle doesn't have that option.All useful outputs are generated via the ULP file. Which are user generated files that are written by users. eagle.autodesk.com/eagle/ulp sarason
Electronics Forum | Thu Jun 04 11:13:39 EDT 1998 | Justin Medernach
| Looking for vendors of splicing tape for 8,12 and 16mm tape and reel. | Any net sources? Mike, Give Siemens a call. They have a decent little system. It's comprised of thin metal fasteners that hold the carrier tape together via the holes, a crim
Electronics Forum | Mon Jun 12 10:46:37 EDT 2006 | mhanc
I am trying to help a customer with a problem. His Process Tech is out and the operator is trying to load a program via floppy. When trying to load on the Amistar 5630 the following errors occur: Data Type Error (level.4) we continue to load and
Electronics Forum | Mon Oct 09 06:16:31 EDT 2017 | jamesbarnhart
I think you needed an IPC Class 3 annular ring because for very dense designs, the smaller the annular ring the better, as less space is taken by the pad or via and more space can be dedicated to routing the traces in highly populated areas of the bo
Electronics Forum | Wed Jan 03 17:37:16 EST 2024 | davef
IPC Releases IPC-6012F, Qualification and Performance Specification for Rigid Printed Boards Changes address advances in rigid printed board fabrication processes Oct 18, 2023 [https://www.ipc.org/news-release/ipc-releases-ipc-6012f-qualification-and
Electronics Forum | Tue Sep 07 09:11:33 EDT 1999 | Dave F
| We've noticed that there are many different recommendations for pad sizes for various SMT parts. This seems to vary wildly from manufacturer to manufacturer for the same case sizes. Is there any standards that can used used to specify these sizes
Electronics Forum | Thu Jun 24 11:41:10 EDT 1999 | John Thorup
| Recently, there has been an upsurge in the Pin Hole/Blow Hole problem in our wave soldering process. We are baking the PCBs for 2 Hrs. at 125 degree C. The Wave Soldering profile seems to be O.K. Still the problem is persistent. Can somebody hel
Electronics Forum | Thu Nov 30 16:10:05 EST 2006 | Hussman
Wow, why all the anger? This gap you guys are talking about is measured as "G" in IPC/EIA J-STD-001 (Chunks was there, but she failed to read the fine print). And almost all parts that measure G follow Note 3 which states "Properly wetted fillet s
Electronics Forum | Fri Jul 30 14:16:11 EDT 2004 | C.W
For VIA In PAD design, what's the difference between a thru vias and a blind via? thanks' chester
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