Electronics Forum | Thu Nov 26 03:59:50 EST 1998 | Chi-Ting Chen
I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is cause
Electronics Forum | Thu Nov 26 06:07:40 EST 1998 | Earl Moon
| I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is cau
Electronics Forum | Tue Apr 06 11:17:01 EDT 2004 | ccl
hi, i encounter gold surface contam issue on wire bonding ring after prebake at 150 C for 3 hrs, tis cause wire bonding non stick issue. the contam seem begin at the solder mask area toward center of the bonding ring, but is not consistance.
Electronics Forum | Wed Feb 09 16:43:51 EST 2005 | George
Thank you Dave.. Your the best. How you know this stuff is beyond me.
Electronics Forum | Thu Jan 15 15:16:56 EST 2009 | jsherrow
We recently had our customer report a component failure trend of a few percent. Analysis indicates wire bond failure internal to a d-pak caused by what appears to be chlorine contamination. We're running a lead free process with aqueous wash. 700 co
Electronics Forum | Fri Nov 27 08:07:50 EST 1998 | Earl Moon
| | | I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is
Electronics Forum | Thu Oct 26 17:48:47 EDT 2000 | Dave F
In response to your questions: 1) Suggestions on substrate material FR-4 or something better? Most PBGA are on BT. That might good for you, also. 2) Are there design guidelines for wire bonding pattern on the substrate? Several things: 1 Doesn�t
Electronics Forum | Mon Jun 18 18:17:10 EDT 2001 | davef
What to you consider to be the minimum resolution [micron] for: General, BGA, die attach uBGA, flipchip, wire bonds Wire cracks, delamination Microcircuit failure What is the relationship between resolution [micron] and the kV of the tube?
Electronics Forum | Mon May 12 10:48:49 EDT 2003 | Theresa Woodford
Does anyone have any experience with plasma cleaning? I currently have an IMS Substrate (10-15 microinch gold flash over electroless Ni) attched to Ryton PPS / R40 walls (40% glass filled/compression molded). The wall is being attached to the IMS u
Electronics Forum | Tue Jan 30 08:21:02 EST 2007 | GS
Please who can help me? I am looking for fiducial (cross shape) mark (target mark? Swiss mark?..)specifications used when COB wire bonding on PCB laminate. Pad pitch should be 250umm may be 220umm?). Mainly need to know which are the tolerances
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