Reflow soldering problems and traces under component

Some people involved in PCB assembly process claim that SMD components reflow soldering problems are often caused by traces running under a component. According to this claim, trace (or any copper) covered by solder mask and placed under SMD component is high enough to lift slightly component body and cause reflow soldering problems. It may happen if component standoff height (a gap between component body bottom surface and component lead bottom surface) is 0. Is it a correct claim?

I compared the numbers (however I’m not sure if they are precise) and it looks that trace running under the component body shouldn’t touch it and cause any reflow soldering problems.

Assuming that PCB is 100% flat and copper thickness is uniform and there is LPI solder mask: Max height of trace covered with solder mask above PCB surface: Copper thickness + 1 mil (solder mask thickness) = copper + 1 mil Height of solder paste layer above the PCB surface: Copper thickness + 0.25 mil (ENIG plating thickness) + 2 mils (solder paste thickness)= copper + 2.25 mils

Running traces under SMD components is sometimes hard to avoid when there is no enough space on the board. Also, if the claim is true, using copper pour on the external layers of the PCB should be avoided. However, copper pour is often necessary to provide shielding and also to balance copper on the PCB.

So, can solder mask covered traces (copper) under SMD components cause any reflow soldering problems? Are only some components like leadless QFN for example, prone to soldering problems if they are traces under them?

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Some people involved in PCB assembly process claim that SMD components reflow soldering problems are often caused by traces running under a component. According to this claim, trace (or any copper) covered by solder mask and placed under SMD component is high enough to lift slightly component body and cause reflow soldering problems. It may happen if component standoff height (a gap between component body bottom surface and component lead bottom surface) is 0. Is it a correct claim?

I compared the numbers (however I’m not sure if they are precise) and it looks that trace running under the component body shouldn’t touch it and cause any reflow soldering problems.

Assuming that PCB is 100% flat and copper thickness is uniform and there is LPI solder mask: Max height of trace covered with solder mask above PCB surface: Copper thickness + 1 mil (solder mask thickness) = copper + 1 mil.

Height of solder paste layer above the PCB surface: Copper thickness + 0.25 mil (ENIG plating thickness) + 2 mils (solder paste thickness)= copper + 2.25 mils

Running traces under SMD components is sometimes hard to avoid when there is no enough space on the board. Also, if the claim is true, using copper pour on the external layers of the PCB should be avoided. However, copper pour is often necessary to provide shielding and also to balance copper on the PCB.

So, can solder mask covered traces (copper) under SMD components cause any reflow soldering problems? Are only some components like leadless QFN for example, prone to soldering problems if they are traces under them?

reply »