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IC Solder Voiding

Views: 4784


IC Solder Voiding | 21 November, 2019

Ok, Question for all of you quality inspectors out there. Would you consider the IC image here to have excessive voiding given the amount of vias ? I only see an IPC voiding spec on BGA balls but nothing for IC's. I'd appreciate all your thoughts ?


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IC Solder Voiding | 21 November, 2019

Do you mean the void over the vias? That's normal phenomenon due to air or solder go into the vias causes void.

You can check the IC datasheet to see if any requirement for solder connecting on the central body grounding area, suggest you have >=50% area soldered.

If you need less void the the grounding area, you can increase solder paste area/volume.

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IC Solder Voiding | 22 November, 2019

I'm worried about the voids that you have on the heel fillet of the leads. Off the top of my head, I don't recall if/what the IPC spec is for voids in gull lead fillets is but my gut instinct is that you're compromising the mechanical strength of the solder joint. The heel fillet provides the bulk of the mechanical strength of the joint, and from the image much of that fillet is missing.

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IC Solder Voiding | 26 November, 2019

Thank you for the response. Nothing in the datasheet referring to a percentage of thermal pad coverage. I am thinking along the same lines. We are not failing any thermal or functional testing as is so am thinking there is no problem here except maybe for the voids in the functional pads.

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IC Solder Voiding | 26 November, 2019

I am more worried about those voids also instead of the voids in the thermal pads. I still can't find any IPC spec that calls out a min. void percentage other than on BGA packages.

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IC Solder Voiding | 26 November, 2019

It's hard to tell from the image but it looks like there isn't much room for a heel fillet.

Seems like that could contribute to your voiding (or poor wetting) if there isn't enough paste volume there.

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IC Solder Voiding | 27 November, 2019

OK, if has concern on void in the function pin area, you need cross section of the pins solder joints, to see how much area ratio of the void to solder joint area. Of course you need make sure solder joint (the toe and heel, height)meet IPC requirement. And also you can use X-ray image to calculate the void to solder area ratio, suggest the ratio is within 25% is better, the void could reduce solder connecting between the function pin and the solder pad, that's main concern.

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