Printed Circuit Board Assembly & PCB Design SMT Electronics Assembly Manufacturing Forum

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Process Characterisation

Chris May


Process Characterisation | 29 November, 2000

Dear People,

Can anyone point me in the right direction.

I am involved in manufacturing low volume (batches of 4-20) pcb's.

I have been investigating Process Characterisation ref EIA/JEDEC PUBLICATION 132.

For such a low volume scenario, has anyone decided which "tools" would best suit ? (DOE, Pareto, Cause/Effect, etc;)

Thanks in advance,


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Michael Parker


Re: Process Characterisation | 29 November, 2000

Chris- you did not mention some details regarding your processes and volumes. Are you using SMT, PTH, mixed? Machinery involved (automatic vs. manual). Volumes - same 4-20 assemblies, at what periodic rate? Are you doing R&D prototypes only? High or low density (component count)?

DOE is a must. You should also consider Design for Manufacturability (DFM) and Testability (DFT) rules.

Pareto helps when continuos processing of a significant volume over time begins to show trends. If you are building so few, you can practically give each PCB a pet name, because you know it so well. Charting data is relatively a waste of time in this scenario.

Cause and Effect is always good to consider and document to help define the difference between design, materials and process defects. Once the root cause analysis is done, Pareto can be implemented to help spot trends.

If you provide more details such as questioned above, maybe some "tools" could be better recommended.

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Chris May


Re: Process Characterisation | 30 November, 2000


Thanks for your response.

More info:-

The processes are as follows, Stencil Print (6 thou on DEK 248) Placement on Contact 3AV and Reflow on BTU 4 zone Top & Bottom oven.It is not an In-Line system. Our board technology is mixed but heavily biased towards SMT double sided. The PTH content is all hand assembled. We run R&D and production through the same methods. We have about 200 board types that are various shapes and sizes, some are flexi-rigid circuits.

We produce Opto Electronic camera systems for pipe surveying, hence the weird and wonderful shapes and sizes.

At present, we are being measured on the first time pass rate of PCB's, but I dont believe that this would properly reflect the PCB assembly process, as 10 boards could have one open circuit joint each and I have 0%. However the total joint count could be into thousands, so 10 joints out of thousands........


Chris May

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Michael Parker


Re: Process Characterisation | 30 November, 2000

Thanks for the details. Next question- where is your first time pass rate measured? Is this at test? Do you have inspection gates at the end of each process step? To get to the root cause, you need the earliest detection. Collect attribute data by assy. number, defect location, pin number if the defect is occuring at an IC. Use Excel to collect data, this is a good off the shelf program that does sorting, which is necessary to get trended groupings.

Beyond that, calculate defect rates in PPM (Parts per Million), avoid using percentages, they can be mis-leading, PPM is more accurate. When getting to a PPM value, decide what is the Million opportunities that will consistantly be measured to - is it component placements? or solder joints? You need component count per assy for each calculation, number of pins per component, quantity of assy's per Work Order.

Good luck

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Murad Kurwa


Re: Process Characterisation | 2 December, 2000

Our NPI division is in a same category. We assemble small quantities and lot of different set-ups. I created a DPMO charting method using Excel that we use at Post Reflow, Post Wave and Final QC. In addition, we use x-r charts at screen print for continuous variable of paste height.

All of this is ofcourse after process is charaterized. For initial process characeterisation, we used fractional factorial DOE to assess critical parameter of the process. With current technology and equipment automation, the process window is well defined by the equipment vendors. However, for designs that are at the edge of the design rules, process characterization is useful and we have empployed DOE, FMEA, Short Run SPC, GR&R etc. before considering process to be qualified.

For more info send me an email at


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