DFM / DFT information

Jack: You're correct!!! Sending that stuff one would have shagged me out far less than sending it multiple times. (I always snarl at the the bird brains that send the same message multiple times. Now I know how they do it ... They're stupid!!!)

So, how was lunch? John is a smart guy. Say howcum you guys didn't invite me to yer little soiree?

Anywho, here's some stuff I couldn't find (my bookmarks are a mess. I wish someone could figure them out and get them organized.) / didn't remember / whatever: http://www.pcbprotech.com/Dh3/handbook.html http://mansys.herts.ac.uk/john/ASDESISU.HTM http://www.albert.co.uk/ALBERT/PSTORY/ASSY/ASSYPROC/DESMENU.HTM SMTA Testability Guidelines

I dunno the link for this ...

Electronics Design Checklist by Hank Wallace

This checklist is for electronics designers and technicians who would like to share experiences and create a detailed checklist which the individual designer can pare down to meet his or her specific needs. There are many details that go into making a first-run design success and this checklist helps prevent Murphy's gremlins from marring an otherwise healthy design.

How do you use this checklist?

1. Make a copy of the list on your computer. Edit the rules to conform to your company's practices and delete the rules that do not apply to your work. 2. Discuss the checklist with others you work with, adding items from their experience. For maximum benefit, get their commitment to use it, too. 3. Make the checklist part of your design review and design release procedures. Do not release a product for prototyping or manufacturing until each checklist item has been verified. 4. Keep the original checklist for each release or revision so you can close the loop on the process, adding some items later if needed. For each design error that occurs, add an item to the list. 5. Contribute your suggestions for additions or changes so others can benefit from your experience. Mail suggestions and feedback to EExpert Hank Wallace.

1 Electronic and Schematics 1 all unused inputs terminated 2 race conditions checked 3 Darlington outputs (1.2v low) driving logic inputs 4 mating connectors on different assemblies checked for same pin-out 5 all outside world I/O lines filtered for RFI 6 all outside world I/O lines protected against static discharge 7 bypass cap for each IC 8 voltage ratings of components checked 9 each IC has predictable or controlled power-up state 10 file name on each sheet 11 dot on each connection 12 minimum number of characters in values 13 consistent character size for readability 14 schematics printed at a readable scale 15 all components have reference designators and values 16 special PCB or parts list information entered for each component, if required 17 polarized components checked 18 electrolytic and tantalum capacitors checked for no reverse voltage 19 power and ground pins listed for each component with hidden power pins 20 check hidden power and ground connections 21 title block completed for each sheet 22 ground made first and breaks last for hot pluggability 23 pull-ups on all open collector outputs 24 sufficient power rails for analog circuits 25 LM324 and LM358 outputs loaded to prevent crossover distortion 26 amplifiers checked for stability 27 oscillators checked for reliable startup 28 consider signal rate-of-rise and fall for noise radiation 29 check for input voltages applied with power off and CMOS latch-up possibilities 30 reset circuit design reliable, both glitch-free and consistent; tested with slow power supply fall time 31 separate analog signals from noisy or digital signals 32 ability to disable watchdog timer for testing and diagnostics and emulation 33 sufficient capacitance on low dropout voltage regulators 34 setup, hold, access times for data and address busses 35 check the data sheet fine print and application notes for weird IC behaviors 36 determine effect of losing each of multiple grounds on a connector 37 automotive powered devices must withstand 60 to 100 volt surges 38 check maximum power dissipation at worst-case operating temperatures 39 check time delays and slew rates of opamps used as comparators 40 check opamp input over-drive response for unintended output inversion 41 check common mode input voltages on opamps 42 check for voltage transients and high voltages on FET gates 43 check failure modes and effects of failed power semiconductors 44 estimate total worst case power supply current 45 check pin numbers of all custom-generated parts 46 for buses, ensure bus order matches device order 47 ensure resistors are operating within their specified power range plus safety factor 48 resistor power ratings derated for elevated ambient temperatures 49 electrolytic/tantalum capacitor temperature/voltage derating sufficient for MTBF 50 check for low impedance sources driving tantalum caps which can cause premature failure 51 avoid reverse base-emitter current/voltage on bipolar transistors 52 preferred component reference designators

1 R fixed resistor 2 RN resistor network 3 RV variable resistor 4 C capacitor (network, fixed or variable) 5 L inductor 6 Q transistor, FET, SCR, TRIAC 7 D,CR diode, rectifier, Zener, varicap, LED 8 DL multisegment display (any type) 9 VR,Q,IC voltage regulator 10 U,IC integrated circuit 11 J socket, jack (female) 12 P plug (male) 13 JP jumper (pins, trace, or wire) 14 Y,X crystal 15 M modular subassembly, daughter board 16 S mechanical switch 17 F fuse 18 FL filter 19 T transformer 20 KB keyboard 21 B,BT battery

2 PCB Design 1 hole diameter on drawing are finished sizes, after plating 2 finished hole sizes are >=10 mils larger than lead 3 silk screen legend text weight >=10 mils 4 pads >=15 mils larger than finished hole sizes 5 place through hole components on 50 mil grid 6 no silk screen legend text over vias (if vias not solder masked) or holes 7 solder mask does or does not cover vias 8 all legend text reads in one or two directions 9 components labeled left-right, top-bottom 10 company logo in silk screen legend 11 company logo in foil 12 copyright notice on PCB 13 date code on PCB 14 PCB part number 15 assembly part number on PCB 16 all polarized components point same way 17 components >=0 2" from edge of PCB 18 ground planes where possible 19 test pad or test via on every net to allow in circuit test 20 test pads 200 mils from edge of board 21 mounting holes electrically isolated or not 22 mounting holes with or without islands 23 proper mounting hole clearance for hardware 24 all polarized components checked 25 no acute inside angles in foil 26 traces >= 20 mils from edge of PCB 27 PCB revision on silk screen legend 28 assembly revision blank on silk screen legend 29 serial number blank on silk screen legend 30 solder mask swell checked 31 through hole drill tolerance noted 32 through hole solder mask tolerance noted 33 through hole route tolerance noted 34 through hole silk screen legend tolerance noted 35 drill legend shows all symbols and sizes 36 mounting holes matched 1:1 with mating parts 37 automated net list check 38 manual net list check 39 check net list for nodes with only one connection 40 CAD design rule check 41 drill origin is a tooling hole 42 check plots sent with disk based photo plot files 43 NC drill and photo plot file language format noted 44 tools on drill plot and NC drill file cross checked 45 solder mask over bare copper noted if needed 46 PCB thickness, material, copper weight noted 47 trace and space geometry noted 48 printed drill report sent with check plots 49 printed aperture table sent with check plots 50 photo plot files checked in file viewer 51 test coupon on PCB containing minimum geometry features 52 trace width sufficient for current carried 53 minimum component body spacing 54 SMD pad shapes checked 55 visual references for automated assembly 56 tooling holes for automated assembly 57 sufficient clearance for high voltage traces 58 component and trace keepout areas observed 59 high frequency circuitry precautions observed 60 thermal relief�s for internal power layers 61 solder paste mask openings are proper size 62 blind and buried vias allowed on multilayer PCB 63 PCB layout panelized correctly 64 panelized PCB fits test and manufacturing equipment 65 sufficient clearance for socketed ICs 66 SMD component orientation arbitrary or consistent 67 ensure pin 1 interpretation and orientation consistent among all connectors of a given type on the board 68 clearance for IC extraction tools 69 clearance for emulator adapter 70 clearance for sockets for ICs during proto phase 71 standoffs on power resistors or other hot components 72 digital and analog signal commons joined at only one point 73 EMI and RFI filtering as close as possible to exit and entry points in shielded areas 74 layout PCB so that any rework or repair of a component does not require removal of other components 75 extra connector and IC pins accessible on prototype boards, just in case 76 check all power and ground connections to ICs 77 provide ground test points, accessible and sized for scope ground clip 78 potentiometers should increase controlled quantity clockwise 79 check hole diameters for odd components: rectangular pins, spring pins 80 check the orientation of all connectors using actual connector/cable 81 bypass capacitors located close to IC power pins 82 all silk screen text located to be readable when the board is populated 83 all ICs have pin one clearly marked, visible even when chip is installed 84 high pin count ICs and connectors have corner pins numbered for ease of location 85 silk screen tick marks for every 5th or 10th pin on high pin count ICs and connectors 86 verify that all series terminators are located near the source 87 place I/O drivers near where their signals leave the board 88 high frequency crystal cases should be flush to the PCB and grounded 89 check for traces running under noisy or sensitive components 90 check IC pin count on layout vs. schematic 91 no vias under metal-film resistors and similar poorly insulated parts 92 check for traces which may be susceptible to solder bridging 93 maximize distances between features where possible 94 check for dead-end traces 95 check for PWR not shorted to GND 96 ensure schematic software did / did not separate Vcc from Vdd, Vss from GND as needed 97 provide multiple vias for high current and/or low impedance traces

3 PCB Assemblies 1 miscellaneous parts on bill of materials and assembly notes for same: hardware, heat sinks, heat sink compound or composite insulators, IC sockets, consumables 2 assembly notes for all special operations 3 conformal coating 4 special static handling precautions required during assembly and test

4 Wired Assemblies 1 wire gauge checked for compatibility with each termination 2 cable ties or lacing cord shown where needed 3 length & color of each wire indicated 4 notes about application of wire terminations (technique, heat shrink tubing, amount of solder, crimp force, tools, etc.)

5 Parts Lists 1 each component has quantity, reference designator and description 2 list qualified part numbers for special devices 3 suggested and alternate manufacturer(s) listed 4 object/binary code and method/programmer specified for each programmable device 5 price and availability checked for each component

6 Mechanical Drawings 1 standard title block and border used 2 no dimensions on the material 3 every feature must have X and Y dimension, along with radius, diameter, etc. 4 every hole must be checked for alignment with mating hole(s) in other parts 5 check every hole diameter 6 tolerance for sheet metal feature position noted 7 tolerance for sheet metal hole size noted 8 specify material 9 specify finish 10 specify units 11 specify debur or brush 12 details for special operations 13 file name on each sheet 14 CAD layers shown on drawing 15 all hardware specified and listed on parts list 16 screw lengths checked; extra thread required for fasteners (nut, lock washer, washer) 17 hole diameters checked for each screw 18 tapped hole thread details indicated

7 Software 1 each version archived for future reference 2 loops checked for terminating conditions 3 communications time-outs checked 4 all branches tested 5 revision history noted for all changes 6 CPU utilization measured 7 interrupt response time measured 8 interrupt execution time measured 9 naming conventions consistent and relevant to humans 10 adherence to coding style standards 11 power-up, power-down considerations 12 unused vectors trapped to restart or damage control routine 13 unused ROM space loaded with trap or restart instructions 14 warm and cold reset differences 15 nonvolatile memory corruption possibilities checked during power-up, power-down, and program-gone-wild conditions 16 design notes within or separate from code 17 check for FIFO and buffer overruns 18 check critical timer driver code 19 check for odd address usage on 16/32 bit micros, especially an odd stack pointer 20 use a LINT utility on C programs to find subtle problems 21 program's data structures contain version numbers to detect program version upgrades and translate the structures' formats

8 Testability 1 test points on PCBs for critical circuits, hard to reach nets 2 test pads for in-circuit or bed-of-nails functional testing 3 test pads on a regular grid 4 test procedure written for each test phase 5 special test arrangements and connectors for testing

9 Maintainability 1 easy disassembly and reassembly 2 fuses accessible and labeled 3 self test mode 4 spare parts available 5 status LED on PCB 6 event logging of exceptional conditions 7 vibration tolerance of entire assembly and individual modules 8 surge current magnitude through semiconductors within rating 9 thermal cycling excursions internal to components and assemblies within acceptable limits 10 capacitors mounted below or away from heat-dissipating devices such as transformers 11 resistance and tolerance of entire product to static discharge via any path

10 Safety 1 fuse and circuit breaker size and characteristics 2 fuse sizes marked near fuse holder 3 room to remove fuse without damaging other components 4 spare fuse storage 5 shock hazards 6 radiated energy warnings and shields 7 applicable standards checked 8 protection against liquids and foreign objects

11 Documentation 1 end-user instructions: unpacking, how to use, warranty, service, troubleshooting 2 service manual: troubleshooting procedures, parts lists, help line information 3 design notes: why were significant design decisions made the way they were 4 other information that may be lost if designers depart the organization

Source: EDTN Network Partners

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