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Touch-up and inspection of visual defects

Daan Terstegge


Touch-up and inspection of visual defects | 25 April, 2005

I have a question about inspection, touch-up, and how far you need to go to get a product that meets the required IPC-spec. According to some reports (i.e. "New Study Reveals Component Defect Levels" by Stig Oresjo of Agilent) the average defect level in PCB assembly is around 1100 dpmo. Even with much better dpmo-figures it is easy to see that except for very simple boards almost every one of them will have one or more defects before touch-up. A significant portion of these defects will be visual defects like an isolated spot of flux residue, overhang of an occasional bent lead, micro-solderballs, an occasional insufficient solder, an overlooked spike from handsoldering, etcetera. Although these are all real defects according to IPC-A-610, the chance that they will cause the product to fail during their service-life is minimal.

Now the point of this posting is: how much effort do you need to put into finding and correcting visual defects. You could argue that every board that still has a visual defect simply does not meet the IPC-requirement, and therefore every boards needs to be 100% inspected and reinspected until you can be sure that you have found and reworked all visual defects. The result is a nice-looking product which meets all the inspection requirements of IPC-A-610, but unfortunately it will be an expensive board. Another approach is to visually inspect the boards mainly for the purpose of feedback to the assembly process (on sample basis), and rely on electrical tests for finding defects to be reworked. Quick and effective, but only some of the visual defects will be found and thus, formally, the product (or at least some of them) will not meet the inspection requirements of IPC-A-610.

I try to convince others that we spend much more time on inspecting than we should, but so far every visual defect that is found is regarded as proof that I am wrong. I am interested to hear how others are coping with this issue.

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Touch-up and inspection of visual defects | 27 April, 2005

Hi Daan,

What we did in the time was pareto analyses on all board designs to determine the critical areas (mainly design errors) and only inspect those specific problem areas. Every batch had a copy of the PC board with problem areas marked and only those areas were checked for defects. Boards with little defects did not go trough a visual inspection, we relied on in-cuircuit test, and boards with defects were set aside for repair with the out print of the ICT taped to the board.

Many times when I assist in the field introducing new soldering technology I get engineers to look at me as coming from mars when I conclude big progress in soldering results with 3 shorts per board always at the same place compared to one random short per board. What they don't understand is that random defects mean lack of process control or quality of materials used in their soldering operation, and that defects always at the same spot indicate good process control but boards with design errors. The most important part is that once the design errors are corrected the board will have no defects. I absolutely agree that a 100% visual inspection is way too expensive certainly in today's competition with low labor cost countries.

Companies with little visual inspection (but with a sound documentation of problem areas on their boards) produce higher quality products compared to companies with 100% visual inspection.


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