Printed Circuit Board Assembly & PCB Design SMT Electronics Assembly Manufacturing Forum

Printed Circuit Board Assembly & PCB Design Forum

SMT electronics assembly manufacturing forum.

Design rule for vias

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Design rule for vias | 5 December, 2006


Currently, we are running new product,server card, and encountered hugh false alarm (17%) at ICT station. Already confirm its is not flux issue...False call always on the vias location. I also notice the vias size is much smaller than those at motherboard. Would it be the vias size that cause this failure?? If yes, do you know what is the best vias size to avoid false call?

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Design rule for vias | 6 December, 2006

It's worse than just using the test equipment manufacturer guidelines. Along with that, you have to deal with each of the test fixture fabricators' preferences as well. What this boils down to is a negotiation with the test engineering group as to what is testable. They are not even slightly embarrassed asking for 100% bottom side only coverage with 0.040" square test pads on 0.100" centers (on a grid, of course) for a board with 6/6 mil line/space, 8/18 mil via hole/pad and 0.8mm BGA. Totally out of touch. Design and board fabricatio technolology moves om, while testing is so 1990s.

For a touch of realism:

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