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Minimizing Voiding In QFN Packages Using Solder Preforms

SMTnet Express July 27, 2012, Subscribers: 25333, Members: Companies: 8933, Users: 33366

Technical Library

Minimizing Voiding In QFN Packages Using Solder Preforms

First published in the 2012 IPC APEX EXPO technical conference proceedings.

by: Seth J. Homer, Ronald C. Lasky, PhD, PE; Indium Corporation of America

According to Prismark Partners, the use of QFNs is growing faster than any package type except for flip-chip CSPs. Prismark projects that by 2013, 32.6 billion QFNs will be assembled worldwide, which represents 15% of all IC packages.

However, QFNs can be a challenge to assemble, especially when it comes to voiding. In most QFN assembly processes, solder paste is used as a means of attachment. This approach can be problematic, as excessive voiding often occurs due to the lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such voiding by increasing the solder volume of the joint without adding flux volume.

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