Technical Library | 2017-03-22 20:58:08.0
Water soluble lead-free solder paste is widely used in today’s SMT processes, but the industry is slowly moving away from water soluble solder pastes in favor of no-clean solder pastes. This shift in usage of solder paste is driven by an effort to eliminate the water wash process. Some components cannot tolerate water wash and elimination of water washing streamlines the SMT process. Despite this shift, certain applications lend themselves to the use of water soluble solder paste.This paper details the research and development of a new water soluble lead-free solder paste which improves on the performance characteristics of existing technologies.
Technical Library | 2021-04-21 19:28:30.0
Voids affect the thermal characteristics and mechanical properties of a solder joint, thereby affecting the reliability of the solder interconnect. The automotive sector in particular is requiring the mitigation of solder voids in various electronic control modules to the minimum possible level. Earlier research efforts performed to decrease voids involved varying the reflow profile, paste deposit, paste alloy composition, stencil aperture, and thickness.
Technical Library | 2018-02-28 22:28:30.0
Circuit functional density requirements continue to drive innovative approaches to high performance packaging. Some new approaches include; aggressive space reduction, embedded solutions, and those that offer some form of risk reduction and rework potential are now options that are being explored by customers. Requirements for assembly of these types of packages necessitate the deposition of solder paste and assembly of components into cavities of the substrates to gain z-axis density as well as area functional density. Advances in the fabrication of PWB’s with cavities using newly developed laser micro-fabrication processes along with increased circuit pitch density of 50 micron lines and spaces permit new applications for high performance electronic substrates. First published at SMTA Pan Pacific Symposium
Technical Library | 2018-10-03 20:41:44.0
Voids in solder joints plague many electronics manufacturers. Do you have voids in your life? We have good news for you, there are many excellent ways to "Fill the Void." This paper is a continuation of previous work on voiding in which the following variables were studied: water soluble lead-free solder pastes, a variety of stencil designs, and reflow profiles. Quad Flat No-Lead (QFN) component thermal pads were used as the test vehicle. The voiding results were summarized and recommendations were made for reduction of voiding.
Technical Library | 2018-09-26 20:33:26.0
Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.
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