Electronics Forum | Tue Jan 30 10:29:08 EST 2001 | sim_ad
How can you do an assembly with BGA on both side?
Electronics Forum | Tue Jul 21 16:29:44 EDT 2020 | emeto
You have some of the 642s still running? This is impressive. I used to have coupe of these 11-12years ago and I used them for exclusively for simple assemblies with passive components bigger size even back then. Even 0402 was challenge for these base
Electronics Forum | Tue Jan 11 15:33:31 EST 2000 | Prawin Paulraj
Hello, I would like to request some information regarding the interfacing of SMT machines. i am of the understanding that it involves some interfaces like SMEMA 1.1,1.2 and SMPI. I would like to know more about the interfacing of machines using these
Electronics Forum | Wed Aug 31 11:02:28 EDT 2005 | Jason Fullerton
We are using one BGA that has 7 mil bumps on a 20 mil pitch. We use the manufacturer's recommended pad and aperature layout, which is an 11.8 mil square overprint on a 6 mil land. At 11.8 square, you need to use a 4 mil laser cut or a 5 mil e-form st
Electronics Forum | Thu May 23 10:18:02 EDT 2019 | emeto
A little hard to tell without knowing your part details and behavior and your PCB design. I have seen part warping so much that will show opens joints on the sides and short in the middle at the same time. Theoretically you should have area ration of
Electronics Forum | Tue Jan 30 21:13:26 EST 2001 | davef
Two options: 1 Glue 2 Use a dedicated work holder with 'pockets' milled out to accommodate the components on the first side of the board after reflow. Some prefer a pallet that runs all the way through their process. So, these pallets: * Feature
Electronics Forum | Wed Nov 19 13:16:54 EST 2008 | sjpence
Simon, The equivalence factors were used to scale the values measured by ionic testing equipment to the values measured in the standard manual method. There is a good write-up by Bill Kenyon in this Technet Post describing the creating of the facto
Electronics Forum | Wed Oct 06 03:58:25 EDT 1999 | Brian
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Wed Sep 25 15:58:36 EDT 2002 | bschreiber
Hello Dave, I hope that electronic slap didn�t hurt too much. Robf, I am sorry that you did not agree with my initial response, but the answer is very detailed and most of the support material I have is only in paper format so I need to either snai
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