Electronics Forum | Tue Aug 10 15:21:46 EDT 2010 | tanderson
I'm having problems with Quad QSP-2 pick n place machines recognizing fiducials. We are cleaning the fiducials, but that's tedious and time consuming ( I don't know anyone who routinely cleans them). We have solder mask clearance around the fiducials
Electronics Forum | Wed Aug 11 06:40:51 EDT 2010 | bob
If the fiducials are bad. There are 2 lights on the downward camera. The one that you can see is mainly used for bright and shiny fids....the other light is for dark/dirty fids. Turn this light on and set the other for 1 (not 0 because of a software
Electronics Forum | Wed Sep 01 08:16:55 EDT 2010 | sachu_70
Drill holes or tooling holes have higher tolerances than Fiducial marks during PCB fabrication. I would certainly recommend Fiducial recognition as a more reliable approach for better accuracy. You could re-calibrate the Vision system file used for
Electronics Forum | Fri Sep 03 03:49:24 EDT 2010 | sachu_70
In case of pure pattern recognition, i agree with your view. However, the basic functionality of the fiducial is determine any positional offset of the PCB and provide necessary data for correction during the intended operation such as Paste printing
Electronics Forum | Thu Aug 12 22:14:49 EDT 2010 | jdm2008
Anyone out there have this system(optima 7300). We have it and we are having tons of problems. Access violations, "ghost windows" models that when deleted will still call out defects, constant crashing etc. We are wondering if the problem will be
Electronics Forum | Tue Aug 17 18:54:02 EDT 2010 | rob_thomas
Latest and greatest after discussing w colleagues w experience in commercial electronics. According to the 'Printed Circuits Handbook' by Clyde F Coombs JR, the number of "SMT solder rework cycles per component per board is kept to two-three. Beyond
Electronics Forum | Tue Aug 17 11:24:04 EDT 2010 | namruht
I have a question that has been discussed many times, but is always good to get some new insight. We have lots of issues with our no clean process. We use a Kester EP256 solder paste. I would just like to get some general tips on how to get rid of mi
Electronics Forum | Tue Aug 17 12:27:48 EDT 2010 | namruht
That reminds me...We already have home plate apertures on our stencil. Try number 2...I tried an overall reduction based on the copper layer of 10% and used oval apertures. I hope that you guys can suggest something that I am over looking. I know tha
Electronics Forum | Tue Aug 17 13:36:17 EDT 2010 | hegemon
Since you have home plated the apts and done solder reduction, I would take a look at your soldering profile. We have run into this before when running no-clean and found that reducing the initial ramp rate to the flux activation was a help in the
Electronics Forum | Tue Aug 17 14:34:27 EDT 2010 | davef
Comments are: * Too much paste ... reduce it more. * Do not let a traces run between small discrete pads or the heat of reflow will pull a ball to the trace, we can repeat this. * Change the placement height on chip parts to reduce solder spread / mu
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