Electronics Forum: anritsu and analyzers (Page 1 of 2)

Cp and Cpk values

Electronics Forum | Tue Mar 04 15:46:00 EST 2003 | EW

I'm not sure to what degree you are manually crunching this data.....If you can set up the data manually, or parse the data from a recording function, to allow it to import into a database with a formula for Cpk, and everything else you could ever in

Cp and Cpk values

Electronics Forum | Tue Mar 04 17:47:19 EST 2003 | msivigny

Hello EW, thanks for your input, the data collection for measurements such as these can get confusing because you're calculating deviations from set point location to actual placement location and then analyzing the full result. Then there are many o

High-end SPI and AOI?

Electronics Forum | Tue Jan 12 21:24:13 EST 2010 | graceytiu07

We have a Viscom SPI S3054QS. Yup, the machine offers a quite good speed. My board dimension is 150 by 250mm. The cycle time is only about 24 sec. The analyze time is only about 10sec. You can make your loading faster, if that's what you needed. I ha

CIM systems and Final Assembly

Electronics Forum | Tue Jan 23 10:51:08 EST 2001 | floydl

When a company looks at installing this type of system across multiple plants around the country or the globe, what are the major considerations in terms of analyzing the best software to fit these needs? Can you mention to us companies that are cur

YesTech F1 AOI false calls and misses

Electronics Forum | Mon Apr 16 13:24:04 EDT 2012 | rway

That's hard to quantify. I deal with escapes when they occur, but I haven't kept track of that data. It doesn't happen to often. But when it does, I take it back to the AOI to analyze why it escaped, and change the algorithm to catch it, if I can.

CCGA - Stencil design and Reflow Profiling

Electronics Forum | Wed Aug 07 02:24:54 EDT 2019 | ameenullakhan

Hi Dave, Yes the lead was there before reflow. After reflow it has bent inside. The component was inspected before placement. We are unable to analyze, what might have went wrong. Regards, Ameen

CCGA - Stencil design and Reflow Profiling

Electronics Forum | Fri Aug 23 12:33:37 EDT 2019 | ameenullakhan

Hi , Its CCGA part . with normal PCB pad opening similar to other BGA pad . Yes its very surprising and we are not able to analyze. What exactly went wrong. We have new stencil design for this now. Will run it tomorrow. Will update the results.

SMT Solder paste and wave flux evaluation

Electronics Forum | Tue Feb 01 09:53:37 EST 2005 | Howard Sommerfeld

I also have a spreadsheet tool for comparative analysis using criterion weighted scoring. It can be used to analyze any decision, and helps groups reach consensus on why a particular alternative is the way to go. As final steps you can also consider

No-Clean flux residue and RF application

Electronics Forum | Tue Aug 30 15:05:23 EDT 2005 | Shean Dalton

Dear Ing, Have you analyzed why some RF device aren't operational after washing? An assumption is that failures are related to the ultrasonic energy applied. Other possibilities are for poor rinsing, poor drying, inadequate washing on those failed

Lead/Lead Free In-Line Wash and UT cleaners

Electronics Forum | Mon Oct 03 22:16:58 EDT 2005 | Ken

If that's the case, let your customer go. I have run into this situation recently. Q. Why do you not run a dedicated line for lead free? A. You (the customer) give less than 12 weeks forcast and expect us to have a dedicated line for your product?

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