Electronics Forum | Fri Sep 09 11:09:16 EDT 2016 | capse
Full disclosure; I represent ASYS in the southeastern US. Depending on PCB size and mark requirements you can get a laser marker for under $100,000. It can be set up as an island to mark batches of PCB prior to them going to the assembly line. ASYS a
Electronics Forum | Sun Nov 06 03:09:44 EST 2016 | muzzy
Hello. Thank you for your answer. Yes, you are right. It would be best to badmark those boards. But we, as a small contract assembler, can't throw away a 1/5 of client boards just because of damaged fiducials. Using pads and other features as fiducia
Electronics Forum | Mon Feb 13 01:47:28 EST 2017 | soldertraining
Solder flux and solder paste deposition is a standard step during the chip attach and sphere attach portions of BGA and CSP assembly. A technique called ultra-violet fluorescence intensity mapping (UV FIM) has been introduced that allows flux measure
Electronics Forum | Sun Feb 05 03:54:06 EST 2017 | rezaee
Hi If I want to build this board :( http://wiki.friendlyarm.com/wiki/ima...-Schematic.pdf ) in large number, I like to know: 1-What should be the minimum level(number) of production? 2-How much it costs to buy the PCB product line for that purpose(Mu
Electronics Forum | Wed Mar 15 08:47:50 EDT 2017 | emeto
From what I know, you should follow IPC standard for the class assembly that you are building. From your post somebody mentioned something somewhere - doesn't make it official information. I would not be worried about having voids, but what is their
Electronics Forum | Wed Mar 15 09:53:58 EDT 2017 | rob
Hi Etimov, Understood that to us assembling parts that IPC is king, however it isn't neccesarily the bible for design engineers. We've had customers demand almost zero voiding, or had to use conductive epoxy to avoid it. For some of us solder joi
Electronics Forum | Wed Mar 15 10:21:08 EDT 2017 | pzappella
Hello Rob, I totally agree with you. Is this a real problem that is being shoved under the rug or just whatever voiding we get from a belt furnace is good enough. I think vacuum reflow can do much better but is a batch approach and not contin
Electronics Forum | Mon May 15 13:05:31 EDT 2017 | edhare
Pin holes in the gold can allow for corrosion of the underlying nickel and copper to form copper and nickel oxides on the gold surface (example - http://www.semlab.com/blog/?p=564. The corrosion can work itself all the way through the EN layer (exam
Electronics Forum | Thu May 04 10:10:03 EDT 2017 | rgduval
My machines do this kind of stuff all the time. Usually when I don't want them to! But, as long as you can control the z-height during plaacement, I don't see that it should be all that difficult to achieve....depending on package size, of course.
Electronics Forum | Tue May 23 02:41:37 EDT 2017 | zsoden
Thanks Bukas. I've actually gone to a lot of trouble over the past 24 months to completely clean, rebuild and adjust the pump and nozzle assemblies and even through all of that we've still never been able to get theoretical maximal wave height from t
