Electronics Forum | Fri Jan 03 12:12:22 EST 2003 | richard
Good day and thanks for your comments Mike, What did I understood from your notes� 1) ROSE test (�extracting solution�) is probably good enough (with good equipment) to penetrate the space under my micro BGA. 2) I should test 2 parallel batches of
Electronics Forum | Tue Jan 23 06:16:13 EST 2007 | Ayelet
Hi, I am lookinh for standards that define the cleanliness level of the assembly room and also for the test and packaging room. I understand that tehre are some defintions of tempertaure and humidity that shoudl be met. Are there any specs for part
Electronics Forum | Wed Feb 07 07:58:58 EST 2007 | ayelet
Thank you guys. So to summarize - no spec, just need to have decent cleaning... Are you familiar with dust events that caused burning of test stations ? Thanks Ayelet
Electronics Forum | Fri Feb 02 11:24:13 EST 2007 | vze3nk2r
is there a level above 100,000 that does not require the use of booties for general assembly work?
Electronics Forum | Tue Jan 23 10:15:44 EST 2007 | slthomas
J-STD-001C just requires that the area not be so dirty as to contaminate your product, tools, workspace, etc. If you start counting particles, you're into cleanroom territory. Do a search on ISO 14644-1 for specifics. Actually Wikipedia does a ni
Electronics Forum | Wed Mar 12 18:30:22 EDT 2008 | genaro_silvera
Hello Steve: I work at Navico, a company that makes GPSs and Sonars among other products for recreational fishing. I want to know if our SMT, Thru-Hole and Final Assembly areas need to be in a cleanroom environment? I've worked in another companies
Electronics Forum | Mon Feb 05 10:12:32 EST 2007 | slthomas
The use of booties isn't required per se, just considered a standard step necessary to reach the 10,000 target. You also need to vacuum (central vac system, NOT exhausting into the room) daily, mop weekly, have a one piece floor, blah, blah, blah....
Electronics Forum | Mon Feb 26 20:02:42 EST 2001 | davef
First, I don�t understand why your board fabricator can�t do a good job plugging your vias. Additionally, when you consider that they forgot to plug the first batch of boards, it makes me wonder if they are desirable as a supplier. Generally, we us
Electronics Forum | Mon Dec 18 01:25:47 EST 2006 | seety1981
test engineer and product engineer... Hi all, Sorry if this topic is not suitable to be in this forum.. anyway,... i would like to know what the different of the jobs scope between the Test Process and Test Product engineer in semiconductor manufac
Electronics Forum | Mon Feb 23 14:44:08 EST 2009 | sunny
Are boards produced using Vapor phase ovens dirtier than N2 Reflow oven. Are there any studies/papers someone can point to? if not what are the methods to verify this? is IPC specified SIR test using 24B SIR test coupons? please advise. thanks in adv
