Electronics Forum: board (Page 486 of 1638)

force between the pad and laminate material

Electronics Forum | Wed Jun 12 08:13:29 EDT 2002 | davef

Don't sound proper. There is no specification. Pad peel strength test methods are: * IPC-TM-650, Method 2.4.21 for multiple solderings * IPC-TM-650, Method 2.4.8 for copper peel with a Instron machine. Typical requirement for Cu is: 6 lbf/in [1

performance improvement

Electronics Forum | Fri Jun 14 20:46:40 EDT 2002 | kenbliss

Dave, you are ahead of me again. I was thinking that this morning. however it clearly is a problem for him and I based the rest on my experience, anything can be improved but at what cost. If nothing else he can get more boards off his line at the

Comparison between Glue & solderpaste process

Electronics Forum | Sat Jun 22 21:06:27 EDT 2002 | jersbo

I agree with PJC.. The mention of 2 QFPs to wave = more than likely rework to remove bridges and a potential to scrap the board, 25mil isnt as bad as 20 or less.. but the potential is still very real.$$$$$$ reflow/reflow is my 2 cents with the possib

over-shelf-life PCB

Electronics Forum | Thu Jun 20 04:41:47 EDT 2002 | redmary

thanks, but I also encounter the solderability problem. because these boards are HASL or Ni/Au finish, and we print the solder paste and reflow, the result shows the some non-wetting area. and the reliability test also proves to be bad. so the critic

Reflow PBGA

Electronics Forum | Tue Jun 25 15:42:39 EDT 2002 | Daan Terstegge

Hi Steve, To my opinion your peak temperature is a little low. If you are sure that the BGA (especially the balls under it) reaches this 205 degrees then it should be OK, but if you measured somewhere else on the board then it's probably better to r

solder crack

Electronics Forum | Mon Jul 01 15:37:56 EDT 2002 | pjc

Possible cause can be design related- if the solder land is too small. Check w/ IPC SM-782 Solder Land Design Guide Another is board finish. I have seen problems like this with Gold finished PWBs- which creates a more brittle solder joint.Another pos

Reflow

Electronics Forum | Wed Jul 03 07:45:22 EDT 2002 | Yannick

Hello, We have some probleme here with our solder joints, I read a lot about what sould I do before pass a board in the oven, what should I consider to make my profile and there is one thing I can't find is how to calculate the thermal mass of my

Yield levels

Electronics Forum | Thu Jul 18 12:33:21 EDT 2002 | slthomas

Not sure if you're trying to improve your defect rate (we use dpmo) or your test yield. The question is what do you do if you're happy with your dpmo levels but not some of your first pass yield numbers because certain boards have more parts. Inspe

Key Production Indicators

Electronics Forum | Thu Jul 18 12:17:30 EDT 2002 | pjc

Machine efficiency is a big one. Placement and auto-insertion machines should have the production rate for a given product recorded in the Routing, Time Standard or Work Instruction. If a given board has a tact time of say 1 minute and you ran 1,000

PCb vacuum seal puncture

Electronics Forum | Thu Jul 18 12:05:19 EDT 2002 | yngwie

Experts, Today I received PCB in a punctured vacuum seal bag. the Humidity indicator change the colour to pink at 60%RH mark. The brd finish is Entek. Earlier our intention to get the board vacuum seal is because we want to ensure that the is no fr


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