Electronics Forum | Thu Oct 05 12:52:34 EDT 2006 | Mario Scalzo, SMT CPE
Good afternoon! Typically, we normally recommend testing the pot, and adding either Sn/Ag or just Sn to keep it at bay. One nice thing about the solubility of Cu in Sn based alloys is that it should reach a theoretical upper limit of about 0.1%. I
Electronics Forum | Wed Nov 29 10:10:50 EST 2006 | M. Sanders
I'm sorry, Dave - I didn't make myself very clear. Yes, this space (not really a "gap") is filled with solid solder. For instance, if you place a gull-wing component in solder paste, after reflow, there will probably be a thin film of solidied solder
Electronics Forum | Wed Jan 17 18:08:51 EST 2007 | John S.
We use a fairly simple system. IPC put out standards 7912A and 9261A to define opportunities. Basicly the "number of components" + "number of solder joints" = "number of opportunities." Some six sigma benchmarking studies indicated "Sigma Level" =
Electronics Forum | Wed Jun 13 15:56:35 EDT 2007 | ck_the_flip
I experienced this with a high-mass capacitor. I was able to turn down the bottom-side convection (around 50�C lower than each of the top-side heaters), and able to NOT lose any parts. I got the bottom-side part just slightly over liquidus, and min
Electronics Forum | Fri Oct 12 13:58:06 EDT 2007 | jdumont
I get the MCV thing. I dont see it spelled out anywhere when it says each component is to be treated singularly. To me �...a maximum concentration value of 0,1 % by weight in homogeneous materials for lead, mercury, hexavalent chromium, polybrominate
Electronics Forum | Sat Nov 10 21:15:04 EST 2007 | mika
make 4 square rounded corner apertures around the ground pad and the total reduction of 20 % (80 % solder paste). Then you still be able to solder the terminals around. We SMT-mount & reflow soldering various QFN packages onto our customers pcb:s wi
Electronics Forum | Mon Nov 12 09:22:41 EST 2007 | devajj
BTW, The surrounded QFN fine pitch terminals > should have the normal aperture reduction of 7 % > in case of RoHS Senju solder paste. This works > for our Telecom customer. > > The vias in the > ground pad will be somewhat filled with solder >
Electronics Forum | Mon Jan 21 21:12:11 EST 2008 | davef
Calculate numbers according to your situation, as follows: Cost = Cost per kilowatt hour x [Amps x volts x hours of operation � 1000] Cost per kilowatt hour: What we need to do to figure out the total cost is get out our electric bill. Look on the
Electronics Forum | Tue Aug 12 19:18:34 EDT 2008 | arminski
Hi davef, couple of questions: clarifying costing of direct labor against overhead cost: an operator loading PCB onto the reflow oven is a direct cost, how about the reflow process time of the PCB while travelling inside the reflow, is that an ove
Electronics Forum | Tue Dec 09 18:03:39 EST 2008 | davef
First, you cannot determine foil thickness from its weight per area, because there is significant variation in the density of electrodeposited copper. Second, the official IPC specification for minimum thickness is "after" processing by the fabricat
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