Electronics Forum | Mon Jun 01 22:56:39 EDT 2009 | davef
Reflow soldering de-ages the capacitors. Two things may be affecting your testing. * Capacitance measurements are often erratic during testing for about 10 hours after de-aging. * Test limits should be set so that the capacitance value is within the
Electronics Forum | Fri Mar 20 04:28:08 EDT 2009 | milas
Hi Does anyone have any experience with assembling pcbs that have embedded capacitance ? are there any do's and dont's over and above manufacturing a standard mulit-layer pcb ? Tahks inadvance Milas
Electronics Forum | Mon Sep 06 04:42:18 EDT 2004 | KenF
Thx for the replies. Acutally I am doing a process related study to see whether the process (pcb depanelling)can induce crack to an MLCC. After depanelling, I will do a thermal shock on the MLCC based on IEC 384-1, that is, five cycles of 30min at hi
Electronics Forum | Wed Oct 04 11:36:06 EDT 2006 | flipit
Hi, Anyone ever have an issue with stray capacitance when using no clean solder paste. We are having a timing problem on one product. The problem goes away when we clean the assemblies. We use a no clean process normally. These assemblies worked
Electronics Forum | Tue Dec 28 03:54:50 EST 2010 | riscy00
Hi Has anyone has thermal capacitance model for QFN (9x9) package with exposed pad 7 x 7 (or 6 x 6). Ideally between junction and case, junction case and board (JESD51-7 or similar). I wish to do transient with spice, to established how long it tak
Electronics Forum | Wed Sep 23 07:51:28 EDT 2015 | kkay
We have been experiencing an issue where our Panasonic film caps on a board are losing their rated capacitance. We are well within their recommended reflow specs and no other operation exposes the part to a temp of more than 160°C. The caps will read
Electronics Forum | Wed Aug 18 15:56:20 EDT 1999 | david dougherty
Hadco offers a technology of building in a "buried" capacitance layer (& other embedded passives) in organic PWBs (FR4 for example). see http://www.hadco.com/prod03.htm and a design manual is posted here: http://www.hadco.com/pdfs/bcguide.pdf I am c
Electronics Forum | Mon Dec 26 13:24:12 EST 2005 | mariss
I'm assuming the fracture in tension; the fracture doesn't show even at X50. The broken edges are that clean. I would expect spalling at the fracture edges if it were a compression or torsional fracture. This makes me belive the board expands and pul
Electronics Forum | Tue Nov 26 12:20:39 EST 2019 | rossrohrer1
I ordered a capacitor book. I reinstalled the crystal that i purchased from digikey, and swapped the two load capacitors out from 30pf to 10PF which works out well with the datasheet that calls for 10pf Load Capacitance, and this equation (CL = (C1
