Electronics Forum | Tue Sep 14 16:09:39 EDT 2004 | Guest
I want to show our production that changing over the pick&place line can be done much faster than we do now, but only if we organize things in a different way. What I would like to discuss with the operators is how Formula 1 teams are doing their cha
Electronics Forum | Fri Sep 17 13:24:27 EDT 2004 | Bob R.
I also agree with Russ - we use step stencils when we have to but generally try to avoid them because the print isn't as consistent as with a single thickness stencil. Many of our products are for harsh environments so we do a lot of thermal cycle a
Electronics Forum | Fri Oct 01 13:37:27 EDT 2004 | rkevin
Well Thanks for all the good advise. Lots of different opinions on this one. I took the advise to contact my current supplier of solder paste. They sent in one of their tech people along with a sales guy and we ran without much trouble. Other than a
Electronics Forum | Thu Sep 30 03:33:58 EDT 2004 | pioneertechnology
Hi All We have two boards that we produce which are chip on glue. For this we use KME BD12's which use air to dispense the glue dot on to the board. This is not ideal as the glue dot size differs as we go down the tube causing us quality problems.
Electronics Forum | Thu Oct 07 12:14:14 EDT 2004 | bschreiber
The pre-solder cleaning of misprinted PCBs can be a completely different experience from a post-solder application. While the paper that DaveF references is excellent, you may want to read the paper by Richard S. Clouthier, "SMT Stencil Cleaning: A
Electronics Forum | Tue Oct 26 03:12:36 EDT 2004 | Joseph
Dear all, Recently our production encountered high SOIC failure during testing after reflow soldering. All solder fillets (side/heel) are acceptable as per IPC standard.The reject samples (SOIC)being sent to IC manufacturer to verify the failure. Fin
Electronics Forum | Tue Oct 26 11:01:54 EDT 2004 | Simon UK
DO you have an xray onsite? One suggestion is to check what you can with that machine, i know it wont be able to magnify to 200nm or something, but it will show any ESD damage to the wire bonds or any major cracks of the silicon die. P.s. Most devi
Electronics Forum | Thu Oct 28 05:35:49 EDT 2004 | rlackey
Dave, I think you'll find you'll score higher if you add a cheeky half twist - you'll get a higher difficulty multiplier on your final score. Profiling is highly dependant on the quality of your oven, number of zones, temperature profiling tools et
Electronics Forum | Tue Nov 23 15:59:51 EST 2004 | RCanten
I have seen some crazy placement problems that I just couldn't figure out in the past and several have come down to boards moving in the clamp. I would double check to make sure you are clamping secure enough and slow your table speed down and see if
Electronics Forum | Thu Nov 18 11:47:17 EST 2004 | Nate
We currently redoing our floor layout and need to squash our SMT line into a smaller, rectangular cell. We currently use a manual printer/stenciler, pick and place, reflow oven, and aoi inspection machine. Can anyone give me any links to any differ
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