Electronics Forum | Mon Jul 07 09:47:50 EDT 2008 | davef
Dye & pry test reveals the solder connections that have failed prior to performimng the test.
Electronics Forum | shellydhami |
Sat Jul 05 14:04:31 EDT 2008
Electronics Forum | Fri Apr 01 23:32:39 EST 2005 | ccgooi
Hi, I would like to understand more about dye and pry process for BGA assembly. Can anyone provide me more information about reference about this topic.Thanks.
Electronics Forum | Wed Mar 12 07:33:40 EDT 2008 | callckq
Hi All, One PCBA failed test after went through the Shock Test(Vibration) and suspected to be BGA solder ball crack. We performed dye and pry and found PCB's pad lifted with red mark ink penetrate pad underneath, what does this mean? Can I say the
Electronics Forum | Wed Mar 12 23:00:10 EDT 2008 | davef
You can say: The pad was lifted after reflow and prior to the dye and pry failure analysis. When we see lifted pads, we think: * That's a good solder connection * Either it took a lot of force to lift that pad or the fabrication of the board in the
Electronics Forum | Wed Jan 26 09:27:41 EST 2005 | davef
Look here for more on dye & pry: http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=25007
Electronics Forum | Sat Apr 02 07:26:47 EST 2005 | davef
It's used for BGA 'disassembly'. Look here http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=32271
Electronics Forum | Sat Mar 15 01:03:10 EDT 2008 | callckq
All, What if BGA solder crack do exist after the shock test? Its happen at the corner of the BGA. Base on your experience, what are the potential root causes? Thanks, Sean
Electronics Forum | Mon Mar 17 03:50:12 EDT 2008 | Sean
Hi All, Besides the above question, I have another one as below: (1) How frequent that we need to perform strain gauge study on ICT, Functional test fixture? Is it a necessary to perform this study each time after ICT, Funtional test fixture preve
Electronics Forum | Mon Aug 15 18:42:53 EDT 2011 | bandjwet
Does anyone have experience in doing dye and pry analysis on PoPs? A customer wants to know whether or not the board level or device-device interconnect is the suspect. What other technique can anyone recommend? BWET