Electronics Forum | Mon Mar 13 04:37:13 EST 2006 | Daniel
Hi Experts, We have requirement from our customer to control the PCBA flatness at 10 mils diagonally. Weird but this is the requirement due to the need for some through hole pins (spreaded acroos the board must touch the copper sheet while they are
Electronics Forum | Mon Mar 13 17:04:19 EST 2006 | slthomas
Wow. I'm always just happy to get 100 mils/10 inches from a bare board, let alone
Electronics Forum | Mon Mar 13 22:29:50 EST 2006 | davef
Warp depends on: * How close the board gets to its Tg during the reflow cycle (the closer you get to the Tg the worse the warp gets) * Amount of copper on each side and the balance between the two * Thickness of the board * Overall length x width * T
Electronics Forum | Sun Nov 19 22:21:37 EST 2006 | KEN
When you say "SMD" I am assuming you are refering to a component. But in your description you mention these are some type of "boards". "flatness" or coplanarity is a function of the application and process. I think in your case your standards wo
Electronics Forum | Fri Nov 17 14:36:17 EST 2006 | Fer
Good afternoon all, There is an issue in my company regarding flatness on SMDs. The part I am fabricating is a multilayer assembly of .175" by .175" by .049" thick. The part is made out of a multilayer copper clad PTFE with a tin finish surface. Af
Electronics Forum | Mon Nov 20 12:03:42 EST 2006 | ferqs
Good morning Ken, Thank you for your feedback. Just as a clarification, SMD stands for Surface Mount Device. Although my end product, in this case, is a SMD, it might be also referenced as a board. In the other hand, what I get from your feedback i
Electronics Forum | Sat Nov 18 08:42:11 EST 2006 | davef
Bow & twist: IPC-A-600. Acceptability of Printed Boards 1.5%; Goal 0.005" per inch; Practicle 0.007" per inch
Electronics Forum | Sat Nov 18 21:20:58 EST 2006 | Fer
Dave, May I ask where did you find the 1.5%, or the goal of .005" (or .007") per inch? The IPC-A-600 bow and twist standard calls for a .75% based on the calculation of the test method TM-650, method 2.4.22, which calculates the percentage based on
Electronics Forum | Mon Nov 20 19:49:03 EST 2006 | davef
Sorry for stating this incorrectly. It should been: Bow & twist for bare boards and panels: IPC-A-610 Acceptability of Electronic Assemblies, 10.6: 1.5% for PTH only and 0.75% for SMT, acording to test method TM-650, method 2.4.22 IPC-6012, par. 3.
Electronics Forum | Sun Aug 15 04:43:15 EDT 2004 | Danish
Can anyone advise how to measure flatness of a surface?Flatness on top of IC..
