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Re: Bottom side bridging

Electronics Forum | Fri Apr 10 15:59:51 EDT 1998 | Justin Medernach

| We are having a bridging problem with SOIC 14,16 and 20 pin devices during flow solder of the bottom side of our boards. This bridging occurs about half way up the lead between the board and the body of the IC. The chip parts are no problem. The

Re: SMT Chat room

Electronics Forum | Wed Apr 15 15:14:23 EDT 1998 | D.Lange

| Ben, | I am a fan of sharing wherever it can be done! My only concern is when information sharing gets into commercialism. If it can be done without the commercials, I am all for it. | Good luck. And I am on ICQ now if you need someone to help test

Re: SMT Chat room

Electronics Forum | Wed Apr 15 19:21:46 EDT 1998 | D.Lange

| | Ben, | | I am a fan of sharing wherever it can be done! My only concern is when information sharing gets into commercialism. If it can be done without the commercials, I am all for it. | | Good luck. And I am on ICQ now if you need someone to hel

Re: SMT Chat room

Electronics Forum | Thu Apr 16 12:25:50 EDT 1998 | Mike

This may be a dumb question but what the heck, What is an ICQ #? | | | Ben, | | | I am a fan of sharing wherever it can be done! My only concern is when information sharing gets into commercialism. If it can be done without the commercials, I am all

Re: Temperature profile req's for Pin In Paste process

Electronics Forum | Sun Apr 12 12:55:11 EDT 1998 | Bob Willis

| I would like to invite everyone to share/discuss | information/knowledge/experience they have with | the req's that are assumed to be valid for the | temperature/time relation in the process of reflow | soldering Pin In Paste, Intrusive Reflow or w

Re: Temperature profile req's for Pin In Paste process

Electronics Forum | Mon Apr 13 12:11:41 EDT 1998 | Justin Medernach

| | | I would like to invite everyone to share/discuss | | information/knowledge/experience they have with | | the req's that are assumed to be valid for the | | temperature/time relation in the process of reflow | | soldering Pin In Paste, Intrusiv

Re: Temperature profile req's for Pin In Paste process

Electronics Forum | Fri Apr 10 10:04:44 EDT 1998 | justin medernach

| I would like to invite everyone to share/discuss | information/knowledge/experience they have with | the req's that are assumed to be valid for the | temperature/time relation in the process of reflow | soldering Pin In Paste, Intrusive Reflow or w

Re: temp stress reliability test for SMT solder bonds

Electronics Forum | Thu Apr 09 13:57:33 EDT 1998 | Mike C

| I am currently involved in a reliability project related to SMT QFP and TSSOP fine pitch solder joint reliability. I have decided to use a temp chamber for stress testing. Is there a test standard that covers this? I am also a bit unsre as to wheth

Re: temp stress reliability test for SMT solder bonds

Electronics Forum | Thu Apr 09 14:05:54 EDT 1998 | Earl Moon

| | I am currently involved in a reliability project related to SMT QFP and TSSOP fine pitch solder joint reliability. I have decided to use a temp chamber for stress testing. Is there a test standard that covers this? I am also a bit unsre as to whe

Offre de cours"PCB Design& Layout"

Electronics Forum | Wed Apr 08 15:31:43 EDT 1998 | SMT-ASSY

Cours de PCB Design & Layout - 3 jours � Dorval du 19 avril au 21 avril 98 - Cours accr�dit�s par la SQDM/Loi90 - Cours pour d�butants et interm�diares. Cours donn� en fran�ais. For information on this course held in English please contact us. V


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