Electronics Forum | Mon Jul 16 21:39:40 EDT 2001 | davef
The method you suggest is about the only way to �clean-up� this terrible situation. Realistically, this is a "memory" type condition induced by design, build symmetry, "cross ply construction", excessive cool down rates during lamination or reflow a
Electronics Forum | Mon Nov 15 21:35:50 EST 1999 | Dave F
Bob Bob: Fortunately, you found this before you built-up a lot of product. Some thoughs and other drivel: 1 Use IPC-TM-650, Method 2.4.8 for copper peel with a Instron machine. Typical pad peel strength requirement for FR-4, 2 oz. copper is: 6 l
Electronics Forum | Tue Nov 16 09:44:18 EST 1999 | - bobar
Ken, The technology you are referring to is also known as return-to-web. This panelization method involves a hard tooled perimeter die and a press equipped with an air cushion. The PCB circuit is punched out and then inserted or "pushed" back into
Electronics Forum | Sat Oct 09 09:50:04 EDT 1999 | Ken Fong
Hi, We are using mixed technology in our PCBA. Would like to know whether there is any criteria governing/guiding the use of mixed technology in such aspects as: 1. Some SMDs cannot be used in some kind of PCB materials such as FR1? 2. Some SMDs are
Electronics Forum | Sat Sep 25 07:07:02 EDT 1999 | Brian
| I need a memory jog. What is the term for the growth of conductive contamination after a board is in storage or field? | There are several different mechanisms which can cause this. In reality, ionic contamination is the root cause for many of the
Electronics Forum | Tue Sep 21 17:49:50 EDT 1999 | John Thorup
| | | | I like to see if anyone has any info or experinces with metal inspection templates in a post oven process. | | | | My problem issue is the ESD, since they are metal(12 mil stencil material). I welcome any comment. | | | | | | | | Thank you.
Electronics Forum | Tue Sep 21 17:56:59 EDT 1999 | John Thorup
| | | | | I like to see if anyone has any info or experinces with metal inspection templates in a post oven process. | | | | | My problem issue is the ESD, since they are metal(12 mil stencil material). I welcome any comment. | | | | | | | | | | Tha
Electronics Forum | Wed Sep 22 17:21:45 EDT 1999 | Hugh Martin
| | | | | | I like to see if anyone has any info or experinces with metal inspection templates in a post oven process. | | | | | | My problem issue is the ESD, since they are metal(12 mil stencil material). I welcome any comment. | | | | | | | | | |
Electronics Forum | Thu Sep 09 09:13:10 EDT 1999 | Scott Cook
| hi, i m college student. i m currently doing my Final year project in PCB drilling. the main task is to design auto feeder which allign the PCB properly in position before drilling take place. the close tolerance becomes a big problem to the precis
Electronics Forum | Mon Aug 23 14:40:59 EDT 1999 | John Thorup
| SMTnetters: | | Does anyone know of a place where I can have some test boards made? I don't need a board with a working circuit, traces or anything like that, but a board similar to those "test boards" that you all see at the Placement Equipment
