Electronics Forum: having (Page 2341 of 3473)

LED lifted soldering defect

Electronics Forum | Thu Jan 02 08:04:06 EST 2020 | philc

You might want to try baking the LED's in an oven for 24 hours prior to build. We keep our LED's in a humidity cabinet all the time, as we have noticed poor solderability if they are left out for too long. This may be even more important when buying

Best practice to validate the old - more than 5 year old parts

Electronics Forum | Fri Dec 13 12:29:01 EST 2019 | davef

I'm not conversant in the topic, but I know suppliers to the government are concerned as you are. I have attended sessions on the topic at technical conferences. The topic that you want to search for is long-term storage protocols for electronic comp

Why do some PCB manufacturers reject gerbers due to missing solder masks?

Electronics Forum | Thu Dec 26 20:35:48 EST 2019 | luciano_zhang

I have design some PCBs but last time I met one problem they said missing the solder mask ...any one can give some suggestions why do some pcb manufacturers reject gerbers due to missing sodermask?

Soldering Issue in Sensor component

Electronics Forum | Tue Dec 31 02:29:29 EST 2019 | sssamw

Do you have clear picture show how it looks like solder open? And you can run DOE with TAL and soak time and peak temperature to see which factor is key, or non of them is key then you can try add some flux to see if better before change solder past

LGA voiding

Electronics Forum | Tue Dec 31 17:05:20 EST 2019 | slthomas

Assuming you've already looked at optimizing your profile and stencil design, have you looked at metal load in the paste? I hadn't, but just read that increased metal load (associated with reduced powder size, i.e., moving from T3 to T4) has been sh

LGA voiding

Electronics Forum | Sun Jan 05 20:10:16 EST 2020 | sssamw

Yes, you may need tell us how the PCB designed, how it re-flow(even it's Indium voiding formula), how stencil is. The void ratio means area ratio, not diameter ratio, so you need calculate it. If you have high ratio void, show its picture.

SMT line panasonic CPH target

Electronics Forum | Wed Jan 01 13:03:06 EST 2020 | ramsus

hello experts i want to calculate my target of cph i have a panasonic line composed of three machines 1.CM602L 4 HEADS 12 SHAFT 2.CM602L 4 HEADS 12 SHAFT 3. CM602L 2 HEADS 8 SHAFT + 2 HEADS 3 SHAFT Best regards

SMT Samtec dual edge connector assembly help

Electronics Forum | Wed Jan 08 19:16:56 EST 2020 | spoiltforchoice

http://suddendocs.samtec.com/literature/em_tectalk8a_lr.pdf Even so its still a fairly manual process so I guess you really have to want to use this type of connector because its a whole process in itself and I bet the whole family is a special or

Stencil foil life span

Electronics Forum | Thu Jan 09 18:26:21 EST 2020 | spoiltforchoice

Much like DWL we have multiple stencils that are really quite old (~2003 and still in use) and are perfectly OK. In fact I don't think we've ever worn one out, higher volume designs are far more likely to get a layout change before the stencil gets

Stencil foil life span

Electronics Forum | Fri Jan 10 13:21:34 EST 2020 | emeto

Yes, think of 3prints/minute 24 hours. This is about 4000 prints a day. than you have a marginal process, because customer locked design and doesn't want to change anything. So in our case for 70k-100k prints and we had to change them as the perform


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