Electronics Forum | Thu Dec 29 22:53:14 EST 2022 | davef
Look in the Express Newsletter [https://smtnet.com/express/] dated December 29, 2022 for some papers on "head in pillow"
Electronics Forum | Wed Dec 21 11:33:22 EST 2022 | SMTA-64304420
Does anyone have experience with HiP defects with DDR memory components that they would be willing to share? I am interested in SMT process corrective actions and repair processes. I can discuss this privately if needed.
Electronics Forum | Wed Dec 28 16:49:26 EST 2022 | emeto
HiP most of the time goes back to the component package itself. If they are on the periphery of the part, it is a result excessive of expansion and contraction from the temperature. If it is in the middle, other contributors come in place.
Electronics Forum | Wed Jan 11 18:59:22 EST 2023 | agrivon
At SMT assembly level, the main HiP mitigation actions to consider should be increasing the stencil thickness/aperture sizes (typically in the 4 corners where warpage is maximal) + possibly reducing the reflow peak temperature as probably indicated i
Electronics Forum | Mon Aug 25 06:43:37 EDT 2008 | callckq
Dear All, Recently, we found a strange defect called "Head-in-pillow" defect at CPU socket BGA. The strange thing here is that this problem only appear on that CPU socket BGA and not on the others BGA which were also mounted on the PCB. We suspect
Electronics Forum | Mon Mar 02 08:25:08 EST 2009 | jorge_quijano
Thanx for all your recomendations, we already ask for a 3D SPI and help us well, we are asking for a ultrasonic stencil cleaner. By the way how do you deal with the 'head in pillow' defects? is there a solder paste alloy / profile issue?
Electronics Forum | Tue Aug 28 14:21:39 EDT 2001 | Scott B
You have to be careful here. The figure is expressed as placement accuracy, not process quality therefore 3 sigma does not relate to 2700 PPM defects but 2700 parts per million placed outwith 15microns (0.0006" / 0.6thou). Extrapolating the distribu
Electronics Forum | Tue Aug 26 09:33:04 EDT 2008 | wavemasterlarry
If this board is waved soldered than you may want to look at the wave causing the BGA to reflow a 2nd time when it goes over the wave. The board bows down and the the joint liquidfies and then hardens before the board fully goes back to flat which c
Electronics Forum | Sun Aug 26 12:40:59 EDT 2001 | stefwitt
I would like to enter the discussion by tossing some numbers in. First of all I don�t like the 3 Sigma value. 3 Sigma are 2000 defects per mio. if I remember correctly. This means, if you have 200 components on the board, then every 10 boards have on
Electronics Forum | Wed Feb 25 01:24:34 EST 1998 | Steve Gregory
Dave, I confess I was a tad too general and a bit too extreme describing the way ALL solder joints look on palladium coated leads. I should been more specific about the "pillow-effect". I've seen it regularly with palladium coated leads on small SOT
