Electronics Forum | Sun Mar 28 18:49:36 EDT 2021 | mekmat544
Hello, I would like to ask you if there is some formula how to calculate PTH hole and annual ring for pin in paste technology? Thank you. Mekmat.
Electronics Forum | Thu Jun 10 19:10:05 EDT 2021 | kojotssss
Hi, Get your account. https://software.indium.com/stencil-coach/pin-in-paste-apertures.php
Electronics Forum | Wed May 27 13:42:08 EDT 1998 | Chrys
| R&D is currently designing a board with smt components on both sides of the board. They are adding a 16 pin IC Gull wing. on the bottom side of the board. I have asked for only caps and resistors to be placed on the bottom side. Is there a recommen
Electronics Forum | Wed May 27 14:35:52 EDT 1998 | Justin Medernach
| | R&D is currently designing a board with smt components on both sides of the board. They are adding a 16 pin IC Gull wing. on the bottom side of the board. I have asked for only caps and resistors to be placed on the bottom side. Is there a recomm
Electronics Forum | Thu Aug 22 23:09:34 EDT 2019 | sssamw
Yes, you need work with supplier to see if can run pin in paste for these connectors, even do some experiments. A step-up stencil would be good for these connectors, also connectors pin size and length match with PCB hole design.
Electronics Forum | Mon Jul 22 09:53:13 EDT 2019 | kylehunter
Hey all! As background, I recently purchased a full SMT line for my company. We have a DEK 265, an assembleon opal xii, and a Heller 1500. Currently our jobs are leaded, and the heller is working perfectly. An upcoming job that we are potentially g
Electronics Forum | Wed Nov 29 11:46:57 EST 2006 | slthomas
IPC 610 *C* states that the solder thickness requirement is a properly wetted termination is evident. Fillet height is another aspect and is usually specific to the package but is some function of solder thickness plus a percentage of lead height. D
Electronics Forum | Mon Dec 11 20:44:37 EST 2006 | davef
Title : LEAD-FREE WAVE SOLDER FLUX EVALUATION Author : Michael Havener Author Company : Benchmark Electronics, Inc Date : 09/25/2005 Conference : SMTA International Abstract : The European Union�s deadline to ban lead in electronic pr
Electronics Forum | Thu Nov 30 16:10:05 EST 2006 | Hussman
Wow, why all the anger? This gap you guys are talking about is measured as "G" in IPC/EIA J-STD-001 (Chunks was there, but she failed to read the fine print). And almost all parts that measure G follow Note 3 which states "Properly wetted fillet s
Electronics Forum | Fri Apr 27 08:44:08 EDT 2007 | Brett
For those of you who use via holes as test points, and the via holes must be filled at the wave, is it necessary to have a "dome" on every single test point, or is it sufficient to have the via "filled" with solder? The ICT preson here insists that
