Electronics Forum | Wed Sep 19 17:44:22 EDT 2007 | russ
there are IPC standards, I do not know them all off hand. What are the boards failing for? I have found that sometimes the original design is not optimum for any number of reasons. Some fab shops catch these and correct and may or may not inform yo
Electronics Forum | Fri Oct 12 13:47:49 EDT 2007 | stepheniii
Does anyone here edit Wikipedia? I just checked and couldn't find the IPC link listed there. I still think if you ask what the OP asked then wiki is a good place to start. I did find this interesting link. http://www.ventureoutsource.com/contract-ma
Electronics Forum | Thu Nov 08 08:44:22 EST 2007 | aj
Hi, I have just taken a look at the Connector Images. Is there a difference in pitch between both connectors ? From the photo it looks like the Annular Rings are oversized on Image #1 especially around the centre area ( this might be the image ).
Electronics Forum | Fri Nov 23 15:46:06 EST 2007 | mika
Question: We have an issue right know on a prototype batch with via in the pad on an very small pcb 50x50mm (in a panel of course). The designer has no room to move the vias as they said. The pcb is to packed with components also 8-layers. It is also
Electronics Forum | Wed Nov 07 13:00:41 EST 2007 | jdumont
Hello all, we are having issues with some specific package type aluminum caps we use while running lead free. We used to run these leaded with none of these issues. Basically we are not getting more than 25% hole fill on these parts. I have tested di
Electronics Forum | Wed Nov 07 13:36:20 EST 2007 | jdumont
Hello all, we are having issues with some specific package type aluminum caps we use while running lead free. We used to run these leaded with none of these issues. Basically we are not getting more than 25% hole fill on these parts. I have tested di
Electronics Forum | Tue Mar 04 09:12:35 EST 2008 | davef
Q1. What would you recommend for the best practice or comparison? A1. We'd go with dip & look. It's easy and cheap, requires no advanced degrees in measurology. Have you reviewed "J-STD-002B - Solderability Tests for Component Leads, Terminations, Lu
Electronics Forum | Fri Mar 07 10:55:51 EST 2008 | slthomas
Not sure if you need help with the calculations or the application, so from the beginning: d=defective parts, p=number of parts, dpm=defects per million parts In a nutshell, d/p=dpm/1000000, so dpm=d/p*1000000 We use dpmo (defects per million op
Electronics Forum | Mon Mar 10 20:14:20 EDT 2008 | davef
We'd be unhappy with features that are not in copper that is at the same level as the component pads, because of difficulties the fabricator would have in maintaining registration between the copper pads and the ink used for the features not in coppe
Electronics Forum | Tue Mar 18 22:30:20 EDT 2008 | test74
Completely agreed. That is what the DFM is for. It gives you, the contract manufacturer, the opportunity to describe what you find to be the trouble areas for manufacturability. Given that, you are able to make them acknowledge that if they choose
IPC is the trade association for the printed wiring board and electronics assembly industries.
Training Provider / Events Organizer / Association / Non-Profit
3000 Lakeside Drive, 309 S
Bannockburn, IL USA
Phone: 847-615-7100
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