Electronics Forum | Fri Apr 10 15:59:51 EDT 1998 | Justin Medernach
| We are having a bridging problem with SOIC 14,16 and 20 pin devices during flow solder of the bottom side of our boards. This bridging occurs about half way up the lead between the board and the body of the IC. The chip parts are no problem. The
Electronics Forum | Fri Mar 07 21:02:21 EST 2003 | neil
When printing below .5mm pitch, the recommended stencil thickness is 5Thou, laser cut. Do not use any reduction and ensure wherever possible the pad to space ration is 1:1, the length of the pad is not as important as the gap between adjacent pads. T
Electronics Forum | Thu Dec 09 09:51:34 EST 2004 | russ
One of the things that I have found is the "benchtop/lab" type waves (Low cost) do not perform very well except on the simplest of products, they are lacking critical design elements such as adequate preheat length, laminar flow nozzle design, etc.
Electronics Forum | Wed Jun 21 13:06:13 EDT 2006 | Nathan
Dear All, Thank you very much for your advices and comments. I appreciate that. Does anyone have any idea how much the good working condition second hand MY9 will cost? And how does MY9 compare to SMT 2350C in term of cost and performance? Regardin
Electronics Forum | Mon Apr 09 16:48:27 EDT 2007 | ratsalad
How wide are your pads? What paste are you using? What is your board finish? Could you please post a link to the datasheet for the component? We place a lot of MLFs, both in a Pb and Pb-free process. Our standard stencil design for MLF compon
Electronics Forum | Thu Jun 11 10:02:36 EDT 2009 | dyoungquist
Our cleaning process involves the assemblies being completely immersed in the water bath of the ultrasonic cleaner. The assembly has a QFP44 on it. Customer stated that when these assemblies have been cleaned with water in the past (at a different
Electronics Forum | Thu Nov 20 04:02:02 EST 2014 | hhat
PCB layout of the circuit components, to meet the requirements of anti interference design: 1* arranged for each functional circuit unit in accordance with the circuit flow position, the layout of the signal for circulation, and make the signal as m
Electronics Forum | Mon Aug 05 11:26:03 EDT 2019 | pace_worldwide
Concerning your desoldering equipment, we have made major improvements to prevent solder clogging on PACE Solder Extractor handpieces. Replacing the venerable SX-80, the new SX-100 (and SX-90) Solder Extractor has been improved so that is does not cl
Electronics Forum | Tue Feb 09 18:53:20 EST 2021 | SMTA-64387083
You'll have to do at least 2up array since most conveyors won't handle boards less than 2in wide. I'm assuming it's FR4 lead free temperature material and PCB's are scored in the panel. The 13-16in lengths aren't a problem other than depaneling. With
Electronics Forum | Wed Jan 16 15:22:29 EST 2002 | Terry Burnette
In his book titled "Manufacturing Techniques for Surface Mount Assemblies" author R.J. Klein Wassink describes the relationship between solder land dimensions, component lead coplanarity, board warpage, solder volumes, and solder paste flux wetting b
