Electronics Forum | Tue May 21 15:37:36 EDT 2013 | armelinda
I am looking for a service providing non contact PCB flatness measurement for open board SiP assembly. It was returned for failure analysis with complaint that assembly does not solder properly onto customer system board. Since there are remnants o
Electronics Forum | Tue Nov 28 17:43:03 EST 2006 | IRAS
I'm looking to gain some knowledge on potential causes of solderballs on LGA's and advice on how to eliminate them. we all seeing some solderballs on only the edges of the LGA. Any inputs will be greatful.
Electronics Forum | Wed Jun 03 16:10:54 EDT 2009 | mattkehoe
Here is a little different spin on re-working/hand placing LGA's.. http://www.sipad.com/download/LGA%20Rework%20Document.pdf
Electronics Forum | Mon Dec 19 12:21:09 EST 2005 | Amol Kane
from what i know, Tg is important from thermal stresses point of view. board warpage increases greately when Tg is exceed
Electronics Forum | Tue May 12 10:03:12 EDT 2009 | daan_terstegge
Hi All, I see more and more components like QFN or LGA with bottom-only terminations,with landpatterns getting finer all the time. I have no ppm-figures of our process, but based on a benchmark study by Agilent I'd say that 500 ppm is a decent value
Electronics Forum | Wed May 20 17:00:56 EDT 2009 | dyoungquist
We just placed a 56 pin QFN, 1 per board, on 10 boards and had zero defects. A good paste job, proper placement and a correct oven profile are the keys. If these are set up correctly, on larger runs your defects won't be zero but they should be le
Electronics Forum | Wed May 20 17:18:09 EDT 2009 | daxman
Just out of curiosity, how are you or anyone else determining a defect? Last I checked, IPC had no criteria yet for solder defects for QFN components. Has this changed? Biggest problems we see are voids which our x-ray shows a lot of. Our problems
Electronics Forum | Fri May 22 08:04:30 EDT 2009 | stevezeva
Have any of you ever worked with Actel's QFN 180? A three row I/O QFN? Actel has a published paper on design and assembly guidelines, but we're finding that they are pretty much generic, and don't really work as well as they lead you to believe. ht
Electronics Forum | Tue May 26 15:39:16 EDT 2009 | mikesewell
Amkor's MLF guidelines are very similar to Actels. 1 to 1 on the stencil to part pad on the I/O pads, 75% with a grid windowpane, 0.125 mm/5 mil stencil. For example, the Actel area ratio for a 0.3 mm sq. pad and 0.125 mm stencil is 0.6 which seems
Electronics Forum | Tue Jul 11 10:13:22 EDT 2006 | SWAG
Over time, you might see problems with delam., blistering and warpage if using FR4 carriers. Depending on volumes, you might consider using durostone or some robust material like that for the production runs. Keep in mind that switching materials w
