Electronics Forum: mask (Page 121 of 194)

Re: I looking for a beta site for a new drying process

Electronics Forum | Sat Aug 21 14:35:28 EDT 1999 | Stu Leech

| | | | | | | We have developed a new process for removing moisture from surface mount devices. We have one site where PCB laminate drying has been reduced to 1.5 hours. A standard oven took 4 hours to do the job. I am looking for a firm who does lar

Re: Micro-BGA soldering

Electronics Forum | Tue Jul 27 17:23:45 EDT 1999 | M.L

| | | | Presently protos of micro-bgas (80i/o) pitch .030/.031 | | | | 12BGA per assembly | | | | | | | | The board is a (.062, 4 layers) FR-4 using Dry film | | | | Pads .014inch | | | | Vias within footprint .020inch | | | | Vias to be filled by b

2 questions: via tenting and annular ring terminology.

Electronics Forum | Tue Jul 06 19:38:01 EDT 1999 | John

Q #1) Is it more reliable to have the mask tent over the vias or risk getting vias half filled with solder? These are vias with an .020" hole and .040" or .050" pad. Q #2) When speaking of annular rings, I have always thought of them as minimums. Su

Thanks

Electronics Forum | Fri Jul 09 16:32:35 EDT 1999 | John

Thanks everyone. I appreciate the help. John | Q #1) Is it more reliable to have the mask tent over the vias or risk getting vias half filled with solder? These are vias with an .020" hole and .040" or .050" pad. | | Q #2) When speaking of annular

Re: Wave solder edge covers

Electronics Forum | Fri Jul 02 09:54:02 EDT 1999 | John Thorup

| | | | We are wave soldering some fabs with a lot of unmasked trace area along the edges. The trace area is solid copper covered with tin / lead, no masking, no components along the edges, same on solder side and component side (goofy board design)

Re: Wave solder edge covers

Electronics Forum | Fri Jul 02 10:06:17 EDT 1999 | John Thorup

| | | | We are wave soldering some fabs with a lot of unmasked trace area along the edges. The trace area is solid copper covered with tin / lead, no masking, no components along the edges, same on solder side and component side (goofy board design)

Re: problem when testing the RF product

Electronics Forum | Mon Jun 21 12:03:20 EDT 1999 | Scott Cook

Since Vic posted me privately and asked for the SIR test parameters I spoke of in my other post, I thought I'd respond on the forum. Ok, here they are, per Joe Keller--Solder / process consultant AKA Manko..... This is an accelerated SIR / dendrite

Polyimide PCB card assembly

Electronics Forum | Wed Jun 02 09:21:34 EDT 1999 | Dan Burnikel

Hello all I have a question concerning whether or not there is any special requirements to follow for assembly of a Polyimide PCB card. The customer has the following information on there documentation but since we have never built anything with Pol

Re: PWB plating

Electronics Forum | Tue Feb 09 20:32:54 EST 1999 | Chris G.

| There is also the process where thicker levels or solder is being applied directly to the board. This means no solder paste is applied before component placement. Just flux, place, and refow. | | Chris G. | | Can you tell me more about the p

Re: Selective Soldering

Electronics Forum | Mon Sep 14 17:05:00 EDT 1998 | Rob Fischer

Have you considered using a masking wave solder pallet as opposed to going with new equipment. Utilizing Gerber files we have succesfully designed and manufactured this type of pallet for over five years. If this approach sounds like something you'


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