Electronics Forum | Thu Oct 07 09:59:01 EDT 1999 | Dave F
| I recently had the opportunity to visit the vendor who is making my boards. On my trip I noticed that the guy who was in charge of the SMD placement machine (brand new Samsung) still had to manuallly place about 20%-40% of the parts after placement
Electronics Forum | Thu Sep 30 13:37:08 EDT 1999 | Dave F
| | I am having problems processing immersion gold boards. The achieved solder joints appear acceptable a la IPC-A-610, but the resultant joint does not fully cover the land, i.e. you can still see an outline of gold pad. | | What is the best way to
Electronics Forum | Tue Sep 21 13:12:56 EDT 1999 | Dave F
| My stencil thickness is 6 mil and we got qfp's with fine pitch. | how many percent should i reduce my stencil aperture using a 6 mil stencil for 0.5 mm pitch and 0.4 mm pitch ? | | thanks | Greg: I was going to link you to the IPC land pattern c
Electronics Forum | Thu Sep 09 10:34:02 EDT 1999 | John Thorup
| I am wave soldering a single sided through hole PCB array with (6) .040" round diameter pins that sit .5" off the PCB, and .080" apart. The problem being experienced is that solderballs are appearing on the end of the pins. I have tried decreasin
Electronics Forum | Thu Aug 26 14:45:09 EDT 1999 | Earl Moon
| What are the key steps to achieving high yield with CSP ??? | | (We are trying qualify vendors for volume fab/assembly of some | products which use several CSP devices on each side of the | board. (Some with 0.5mm ball pitch)) | | Looking throu
Electronics Forum | Wed Aug 11 15:58:39 EDT 1999 | Doug Philbrick
| We are using a mixed technology process with mostly through-hole parts plus some SMT IC's on the component side and some passive SMT parts on the solder side. We do not have a proper wave soldering machine for doing solder side SMT (double wave or
Electronics Forum | Tue Aug 10 07:47:12 EDT 1999 | Brian
| | | hello to everybody, | | | we have a really satisfactory no clean process, both smt/reflow and wave soldering, but we get troubles with defects rework; | | | does anybody know how to eliminate flux residues or how not to produce them during rew
Electronics Forum | Tue Aug 10 20:22:15 EDT 1999 | Wayne Sanita
Hello, Could be that touchup operators are using too much flux. What are you dispensing flux with. Disposable or refillable flux pens are good to have around. | | | | hello to everybody, | | | | we have a really satisfactory no clean proc
Electronics Forum | Thu Aug 05 11:15:39 EDT 1999 | John Thorup
| | | | | | | | | Hello, | | If you are using no-clean and they are entrapped in the flux it is also IPC accepted but i havent found a customer yet who agrees with that. Im sure you have checked your profile. I had the same problem with chip compon
Electronics Forum | Mon Jul 26 18:05:18 EDT 1999 | ScottM
| Presently protos of micro-bgas (80i/o) pitch .030/.031 | 12BGA per assembly | | The board is a (.062, 4 layers) FR-4 using Dry film | Pads .014inch | Vias within footprint .020inch | Vias to be filled by bottom side(solder side) only .030in dia. F
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