Electronics Forum | Mon May 06 06:22:39 EDT 2019 | SMTA-Rogers
Hello! Do you have a better stencil design to reduce the large area of solder joint voids? Or is there a suggested way to set the reflow profile? Or are there other process improvements to make the solder joint at the LED pad less than 10% per void?
Electronics Forum | Tue May 07 10:36:38 EDT 2019 | slthomas
Probably just means you started out with an optimal profile. I suspect that not everyone does. ;) It seems like we did have some luck with profile adjustments in one instance with some QFN's with a large thermal pad. Like I said, though, the profi
Electronics Forum | Fri Sep 20 17:43:03 EDT 2019 | deanm
Looks like poor wetting/solderability to me. I don’t see heel fillets on the leads where the solder balls up. The solder has to go somewhere. It won’t flow where it won’t wet. Try printing a bare board and run through reflow. If the solder balls up o
Electronics Forum | Wed Oct 23 10:22:55 EDT 2019 | maxwilko
Hey Kathy, Thank you for the link for the tech support will keep that in mind for the future! After a long series of testing different solutions we found that re-sending the Gerber data over to the 'My500' seems to have resolved the issue, we are n
Electronics Forum | Thu Nov 14 21:57:47 EST 2019 | sssamw
yes, first of all you need confirm if solder ball around solder pad has same location, if so then check squeege if has worn area or not at same location. If not, please check sodler paste itslf to see if dry a little, if so all paste could be a littl
Electronics Forum | Thu Nov 14 10:18:31 EST 2019 | slthomas
It doesn't look to me like the jumper wire is wetting at all. I would immediately question the solderability - do you know how that jumper wire is finished (plating type)? Also, how experienced are the solderers? It could be that the wire never get
Electronics Forum | Wed Dec 11 07:05:28 EST 2019 | ameenullakhan
Hi, Below may help you out. per IPC 7093 ( Design and assembly Process Implementation for Bottom Termination Components ),Clause 6.1.5.3 voids on thermal pad up to 50% does not result in loss of thermal performance. Since the void criteria is
Electronics Forum | Fri Nov 22 05:04:07 EST 2019 | SMTA-Matthew
We have some circuit boards where the solder mask seems clear instead of green on top of some of the tented via pads. No gold deposited during the ENiG process and no solder sticks to it but why is it clear and does it have any correlation to the thi
Electronics Forum | Fri Dec 27 13:16:18 EST 2019 | slthomas
Can you describe the failure mode of the soldering defect, i.e., is it failing to meet the height requirement for a castellated termination due to not wetting of the component terminations, or not wetting the pads sufficiently, or....? We install a
Electronics Forum | Fri Dec 27 14:27:40 EST 2019 | slthomas
We switched to a REL0 T3 paste, Amtech LF-4300. It wets the castellations more consistently. I believe that in our case it was more of a plating wetting issue with the parts, but yours sounds more like a pcb finish or thermal issue. That larger pad
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