Electronics Forum: pcb bottleneck (Page 1 of 1)

Downtime Calculation

Electronics Forum | Sat Aug 17 07:48:43 EDT 2002 | bentzen

Hi Brandon. You should always try to optimize / "balance" your line in a way so the machine with the shortest time per placement is your bottleneck. The other machines in the line should then have a 10 - 20 sec sorter cycle time, to be able to cope

PCBA Time Estimation Formula

Electronics Forum | Wed Feb 19 12:47:15 EST 2020 | emeto

Grandpa, You got it - Identifying the bottleneck operation is the key. The secret is to design a tool can predict accurately where this bottleneck is. In your formula you can use machine process time, PCB transportation time, part trim time, part in

Downtime Calculation

Electronics Forum | Sat Aug 17 07:34:36 EDT 2002 | bentzen

Hi Ken First of all, I think you are right to point out that the uptime should be calculated on the SMD line bottleneck. But I have some comments to your posting in general: The SMD line bottleneck, you say, is always the palcement machine. This i

Downtime Calculation

Electronics Forum | Sun Aug 18 06:23:34 EDT 2002 | bentzen

Hi Ken. It's always fun and a good exercise to debat on a interesting subject like this. I can see at your response that I have to clarify some of the issues. Yes, the placement machine should be the line bottleneck. And in a line with more placem

Pick and place machine for small productions. Any suggestions?

Electronics Forum | Fri Sep 20 00:22:41 EDT 2013 | jvadillo

Thanks for the comment regarding the CPH. In fact, the benchtop oven we have takes 7 minutes to complete a batch soldering, so you can imagine that our production volume will not be very high. We can parallelize PCB assembly and oven phase. But defi

Bang 4 Buck AOI vs Flying Probe??

Electronics Forum | Thu Dec 16 15:06:32 EST 2010 | rway

I would go with AOI. Reasons are: --AOIs are faster --They have more coverage. Given, you cannot test the value of components, but the AOI will ensure that all resistors are correct, orientation of ICs are proper and components are present on the

Re: PCB panellisation

Electronics Forum | Wed Apr 08 00:49:37 EDT 1998 | Steve Gregory

Well...I think we just about beat this one to death, but I'll go ahead and add a couple more points to "pro-score" camp...WITH the caveat that it HAS to be done right! Yes, I will say that I've had to deal with the wrong spec'd or crappy scor

Re: Baking of PCB's/Flexes

Electronics Forum | Thu Oct 26 13:56:08 EDT 2000 | ptvianc

Hello: Pre-baking laminates should only be performed:(1) to meet contractual agreements or (2) in response to an actual defect that can be traced to PWB water absortion. Besides the fact that a pre-bake is an enormous process "bottleneck," it also

Faster Reflow?

Electronics Forum | Thu May 13 17:31:48 EDT 2021 | bandjwet

We have a PCB rework dilemma involving a reflow profile. This is a SAC305/Low Solids (aka no clean) process where we are currently hand soldering (5) components that were DNP. The boards have an acrylic coating and we take off the acrylic at the par

Juki Parallel pickup not working

Electronics Forum | Fri Jul 29 11:31:44 EDT 2022 | jojoled

Hi Guys, I have Juki PnP machine with 2 heads, and for some reason, whatever I do, I can not make the machine to use 2independent feeders for parallel picking up single component reference by both heads from 2 feeders. Example , imagine you have a

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