Electronics Forum: process (Page 201 of 1146)

Re: vibration during solder reflow

Electronics Forum | Fri May 21 12:25:14 EDT 1999 | Dave F

| Has anyone had any experience or data using vibration during the reflow process. | We introduced a vibration device attached to the fixed rail on a Vitronics reflow oven. The reason was to prevent skewing on large PLCC devices. The process worked v

Re: White Tin

Electronics Forum | Fri Apr 30 03:49:25 EDT 1999 | Charles Stringer

| | | | We use Immersion Gold (AuNi) for our 20 mil pitch and BGA boards. | | | | Lately, we have been having solderability problems with boards with this surface from some of our suppliers. | | | | | | | | We are considering trying boards with Whit

Re: Natrium Chloride (NaCl)

Electronics Forum | Mon Mar 01 09:49:04 EST 1999 | Justin Medernach

| It seems to be that we have to much NaCl left on our assambled PCB's. | The flux we use is from cobar. They say it can not be from the flux... So what can be the reason, what kind of problem may occer when there is to much NaCl. | George, Are you

DPMO's

Electronics Forum | Mon Mar 01 09:14:00 EST 1999 | Jules Winfield

| I'm trying to get a feel for what the industry is doing with regards to collecting assembly defect data in the SMT/PWA process. Is it sampling or 100%? What are the points within the process where critical assembly defect data is collected. We run

SPC on stencil printer

Electronics Forum | Tue Jan 12 16:16:21 EST 1999 | Sanjay Bhatikar

For process management with SPC of the stencil printing process with a fully automatic stencil printer, what process outpur parameter would you recommend for SPC? It appears to me that there are two options: A: to have a pn chart based upon the % of

Re: SPC on stencil printer

Electronics Forum | Tue Jan 12 17:56:18 EST 1999 | Jason Hall

| For process management with SPC of the stencil printing process with a fully automatic stencil printer, what process outpur parameter would you recommend for SPC? | | It appears to me that there are two options: | A: to have a pn chart based upon

Re: Cleaning No Clean Wave Solder Carriers

Electronics Forum | Fri Jan 08 17:56:16 EST 1999 | Eric Miller

Hi Chrys, Hate to bring you down, but, wave solder pallets exposed to any kind of flux is subject to "Build up" on the carrier. You still have to clean them, hopefully on a regular basis.If the pallet is being run in a high production envirnment, I w

Re: Fair enough

Electronics Forum | Wed Dec 30 03:23:46 EST 1998 | Bob Willis

| | | | | I have been working on this process for a couple of weeks and I know that there are a few other companies in Europe and Japan who are also playing. | | | | | | | | | | Is there any one who has been running this process in production ? | |

Re: Problems with wave solder

Electronics Forum | Thu Nov 19 06:20:44 EST 1998 | Kelly

| For some as yet unkown reason, we have started to have some boards sag and go under the wave. The boards are surface mount top side and conventional components wave soldered. We have checked the wave hight and both the profiles on the wave solder a

Component Packaging Trends

Electronics Forum | Thu Oct 15 14:35:44 EDT 1998 | Joseph Belmonte

Hi Folks, As I travel our industry it seems to me the trend is to move from finner and finner pitch QFP's to array packages (BGA's, CSP's, etc.). Do you folks see the same trend? What is the finest pitch QFP package you have used in your process? Are


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