Electronics Forum | Wed Jun 01 23:09:46 EDT 2016 | slouis2014
Hi, can anybody give an idea how to lessen the void on a double ground pad IC. I have tried to change the stencil design, change the solder reflow setting. but i still haven't reach 75% solderability. thanks alot
Electronics Forum | Thu Jun 02 22:40:13 EDT 2016 | slouis2014
Hi, yes have a few experiments initially i tried to increase the solder volume but component pin have insufficient solder. 1. The solder coverage do you calculate it by solder volume or solder area. 2. if i would achieve as you recommend 50-60 % woul
Electronics Forum | Thu Jun 02 22:26:46 EDT 2016 | slouis2014
i have tried to design the stencil as attached, but the void is more than 35%. do you have any idea what is the ideal diameter for the stencil aperture for the solder to spread and the flux to be released out of the component simultaneously. thanks a
Electronics Forum | Tue Sep 04 02:28:17 EDT 2007 | philip_yam
Any one has experience over solder voids in oscillator capacitor joint could result in high phase noise during the digital performances test? The noise signal was gone after solder touch up. What could be the root cause of the high phase noise?
Electronics Forum | Tue Sep 04 10:27:33 EDT 2007 | rgduval
I haven't experienced this problem, exactly, but I have had issues with noise in digital circuits that appear to have gone away with touch up. The problem was that the customer blamed the noise issue on the solder quality, and he pointed to the fact
Electronics Forum | Fri Jun 20 03:47:24 EDT 2008 | philip
Hi all, any good recommendation for PbF paste application to reduce voids underneath the QFN thermal pad (stencil thickenss? opening? via hole? reflow profile etc)? We have tried few stencil opening design but no significant improvement as seen. Ther
Electronics Forum | Fri Jun 20 18:32:55 EDT 2008 | hegemon
Back when I used to do a lot of these style devices we ran into the same problem you are describing. Use a pattern for the center pad area and keep the total coverage to about 68% of the pad area. Diagonal Stripes, tic tac toe, cloverleaf, dot array
Electronics Forum | Mon Sep 30 09:26:04 EDT 2002 | itempea
Russ, first step would be to get IPC-7095 on BGAs. A few notes: There can be voids in solder balls, or at the solder joints to the BGA, or at the solder joints to the PCB. Various sources or reasons can be responsible for these voids. Voids can be
Electronics Forum | Wed Oct 09 16:59:35 EDT 2002 | davef
Russ, as I told Eric the other day ... The steadfast rule of thumb is: In order to get reliable reflow, you need to be at or higher than [liquidus + 20�C] for about 5 to 10 seconds, rather than those old "60 seconds above 183�C" guideline. This prov
Electronics Forum | Wed Oct 09 20:52:27 EDT 2002 | davef
Russ, Be careful on how you determine your liquidous point. Sure 205-210�C is fine if your paste and the solderability protection on pads and component leads are near eutectic solder and things worked according to plan, but in real life it doesn't
