Electronics Forum: rejected (Page 41 of 61)

Re: Void in solder bump

Electronics Forum | Fri Jan 15 15:29:03 EST 1999 | Jason Hall

| Our spec on voids is 30% ball diameter in the center. On the component to ball and pad to ball interface, we use 25%. To determine this spec, we asked around. I don't know of any studies that have been done to verify if this is OK | | Regards | Ji

SPC on stencil printer

Electronics Forum | Tue Jan 12 16:16:21 EST 1999 | Sanjay Bhatikar

For process management with SPC of the stencil printing process with a fully automatic stencil printer, what process outpur parameter would you recommend for SPC? It appears to me that there are two options: A: to have a pn chart based upon the % of

Re: SPC on stencil printer

Electronics Forum | Tue Jan 12 17:56:18 EST 1999 | Jason Hall

| For process management with SPC of the stencil printing process with a fully automatic stencil printer, what process outpur parameter would you recommend for SPC? | | It appears to me that there are two options: | A: to have a pn chart based upon

Solder on gold finger

Electronics Forum | Sun Jul 26 20:54:40 EDT 1998 | Masdi Muhammad

Hi, Need some advice on how to eliminate or reduce the solder on finger that we are having right now. So far what we understand is that 90% of the problem is due to the reflow process where solder traps in vias causing explosion when subjecte

PWB Pad Finish & dewetting

Electronics Forum | Thu Dec 06 11:01:19 EST 2001 | Carol Stirling

This SMT process certainly makes a body want to win the $$$ and retire! We have been trying to stabalize the process and keep running into new problems. Any help would be appreciated on this issue. All pads on both sides have the same look - partial

Micro Leadless Frame - solder wetting control

Electronics Forum | Thu May 09 22:32:50 EDT 2002 | ianchan

Hi Guys, thanks to everyone for their help and advise! we are running these LCC parts in the 1000's, so its going to pose a big problem to either: 1) tin-plate the oxide layer, 2) HCL away the oxide layer, thanks for the option shown, dun think so

performance improvement

Electronics Forum | Tue Jun 18 05:40:38 EDT 2002 | ianchan

Hi mates, finally! some sense to all this, so this bloke is concerned about "ppm = quality" variations... looking back through all the muck in this thread, last posting before the s**t hit the ceiling was: ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Date: June

SMT COMPONENTS

Electronics Forum | Tue Jul 16 07:18:37 EDT 2002 | davef

Hey Ken, you open a can of worms, you can�t all of a sudden decide �they�re too slimey�. You gotta fix this one!!! If that means a Chinese visa, we�re behind you this one. {Everyone together now, "Go Ken, go Ken. He's or guy!!!] The fishy part:

SMT COMPONENTS

Electronics Forum | Tue Jul 16 07:33:32 EDT 2002 | pjc

Communication is the issue. What we have here is a failure to communicate....how does that song go? I implemented a system whereby incoming inspection would check component packaging to the spec. If it did not match they were to contact the process e

Tracking SMT Attrition (Load/Unload Loss)

Electronics Forum | Thu Jul 18 11:31:03 EDT 2002 | Mark S.

>But since we are a low volume high mix operation I need to account for almost every part used. I'm in the same boat, and we do more changing of feeders than actual placements it seems. What I have done which has improved things a lot is in our MRP


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