Electronics Forum | Fri Mar 02 06:25:04 EST 2001 | PeteC
Thanks for your feedback. All the 0603 chips have the round solder lands but the 0805 chips and larger are rectangular. After speaking with the designer on it he said they chose round lands for the 0603 chips to get higher density of the circuit trac
Electronics Forum | Mon Feb 26 20:22:01 EST 2001 | davef
As a design rule, provide 0.050" minimum between parts to be "masked" and areas that require wave contact. The more the better is the general rule to apply. Check: http://www.autogroup.com/designguideb/ http://www.spprecision.com/ http://www.datumdy
Electronics Forum | Tue Nov 28 11:31:25 EST 2000 | Deon Nungaray
Hello Robert, As we are all aware the lead-free movement has been somewhat popular lately. We have had in depth discussions about materials, processes and procedures. How about training or re-training? I believe this would be one of the biggest chal
Electronics Forum | Thu Jul 20 16:04:22 EDT 2000 | Bob Willis
Tin/silver/copper is the alloy I have done most with and it would seem that it will be the alloy of choice if you look at the people doing the work. There are still some issues of fillet lifting which I have seen on PIHR soldering and the same in wav
Electronics Forum | Mon Jul 30 21:12:32 EDT 2001 | davef
"Poor release" (paste hanging-up in the stencil holes) could have three main (or combination of) causes: 1 Equipment: Stencil is too thick. Specifically, a 6 thou stencil should be OK, providing you don�t violate the area and aspect ratios in the fi
Electronics Forum | Fri Jan 14 16:21:42 EST 2000 | Dave Chapman
We are having mid chip solder balls on chips and resistors. Seeing the problem on 80% of the assemblies we run. Anywhere from 1 to six of the balls per board. We have slowed the oven down, increased the pressure on the screenprinter to get less paste
Electronics Forum | Tue Oct 21 23:28:59 EDT 2003 | xz xiao
We all know the Lead Free process is trend, so we trial run it, now it is only my comment that we have a good achievement after several tries,we have taken serveral photos about Lead Free process with ErsaScope. 1.The surface of the solder joint are
Electronics Forum | Tue Oct 21 23:29:08 EDT 2003 | xz xiao
We all know the Lead Free process is trend, so we trial run it, now it is only my comment that we have a good achievement after several tries,we have taken serveral photos about Lead Free process with ErsaScope. 1.The surface of the solder joint are
Electronics Forum | Tue Jan 06 15:57:30 EST 2004 | dbdavis
Dear Colleagues, I am evaluating the Linear Tech. Corp. LTC1733 MSE Package for use in our SMT Dept.. For this application I will need to consider the possibility that we will be required to repair these devices after some time in the field. My probl
Electronics Forum | Sun Apr 11 20:03:46 EDT 2004 | Tom B.
You should add a Capacitor Discharge statement in ICT test Software. This could be done by selecting the nodes and have statements to connect relays to ground. Could be possible that the Selective Soldering system is the cause, as problems is now s
