Electronics Forum | Tue Nov 28 15:10:50 EST 2006 | M. Sanders
Unfortunately, I don't have a copy of IPC-A-610 D on hand, however, I believe in IPC-610, this �floating height� between lead and pad has no maximum specification restriction. As long as there is no voiding, it is still acceptable for all 3 classes.
Electronics Forum | Fri Jun 03 15:19:32 EDT 2022 | dwl
I don't recall thicknesses off the top of my head but brittleness becomes an issue more for gold plating then ENIG. .125 um should be fine. also, gold ain't cheap so its unlikely your PCB fab will get anywhere near the max tolerance. On the other e
Electronics Forum | Thu Nov 30 16:10:05 EST 2006 | Hussman
Wow, why all the anger? This gap you guys are talking about is measured as "G" in IPC/EIA J-STD-001 (Chunks was there, but she failed to read the fine print). And almost all parts that measure G follow Note 3 which states "Properly wetted fillet s
Electronics Forum | Wed Nov 29 10:10:50 EST 2006 | M. Sanders
I'm sorry, Dave - I didn't make myself very clear. Yes, this space (not really a "gap") is filled with solid solder. For instance, if you place a gull-wing component in solder paste, after reflow, there will probably be a thin film of solidied solder
Electronics Forum | Tue Sep 04 02:28:17 EDT 2007 | philip_yam
Any one has experience over solder voids in oscillator capacitor joint could result in high phase noise during the digital performances test? The noise signal was gone after solder touch up. What could be the root cause of the high phase noise?
Electronics Forum | Tue Sep 04 10:27:33 EDT 2007 | rgduval
I haven't experienced this problem, exactly, but I have had issues with noise in digital circuits that appear to have gone away with touch up. The problem was that the customer blamed the noise issue on the solder quality, and he pointed to the fact
Electronics Forum | Mon May 06 06:22:39 EDT 2019 | SMTA-Rogers
Hello! Do you have a better stencil design to reduce the large area of solder joint voids? Or is there a suggested way to set the reflow profile? Or are there other process improvements to make the solder joint at the LED pad less than 10% per void?
Electronics Forum | Tue Apr 13 08:21:05 EDT 2010 | esca
Hi manchella, After ATC test, two different failure modes can be present: solder FATIGUE (into bulk) or BRITTLE INTERMETALLIC fracture. So, first you have to verify this. Moreover, which brand of SMT paste have you used ? The crack into solder joint
Electronics Forum | Thu Feb 02 09:07:28 EST 2023 | charles_nguyen
Two types of land patterns used for surface mount pads are non-solder mask defined or NSMD pads and solder mask defined or SMD pads.Each type has its own advantages and disadvantages. There is a statement that SMD pad type may introduce stress concen
Electronics Forum | Mon May 27 04:28:30 EDT 2019 | SMTA-Rogers
Dear Steve, Thanks for your feedback in our experience add solder paste volume is better for the voids reduce of LED type components.
.gif)
