Electronics Forum: test interface boards (Page 1 of 224)

Re: GEM SECS interface

Electronics Forum | Fri Oct 23 18:13:53 EDT 1998 | Dave f

| I am looking for detailed information on the SECS 2 protocol that is part of the SEMI General Equipment Module interface. I was not able to get detailed information from the SEMI web site and was not able to find anything on the web. | | I am look

Re: GEM SECS interface

Electronics Forum | Fri Oct 23 15:15:51 EDT 1998 | Dave f

| I am looking for detailed information on the SECS 2 protocol that is part of the SEMI General Equipment Module interface. I was not able to get detailed information from the SEMI web site and was not able to find anything on the web. | | I am look

SMEMA manual interface control box schematic

Electronics Forum | Thu Dec 03 14:45:16 EST 2015 | ttheis

Thanks. Our older oven does have a basic PC interface but no SMEMA. Maybe I can write a short program for the oven's PC to pace the boards into the oven. I could interact with the conveyor's SMEMA interface via low-cost Arduino or something similar.

SMEMA manual interface control box schematic

Electronics Forum | Thu Dec 03 14:40:27 EST 2015 | proceng1

When we had a line that ended at an older reflow oven without SMEMA controls, I ran a momentary switch to the two pins in the connector. I push the button and the conveyor pushed the board onto the edge-hold of the oven. As a joke I labelled it "LA

BGA ball crack at pad/solder ball interface

Electronics Forum | Wed Nov 29 00:43:45 EST 2006 | callckq

Dear all, Recently, we run 2 models with heat sink attachment on top of this BGA(on top of this BGA, there is flip chip attached at the center of the BGA). Hence, the center of the BGA is higher than corner/side. We used conventional way to attach

delamination test

Electronics Forum | Tue Aug 23 13:03:14 EDT 2005 | davef

What's the point of such a test? * If you are operating a board in an environment that keeps the board at a temperature that is close to causing delamination, why not design a board that can tolerate such an operating environment, rather than contin

delamination test

Electronics Forum | Tue Aug 23 16:57:29 EDT 2005 | HOSS

50% of seeing it in a single pass. The only time we do this is if we have a board off the line that has delaminated. We'll run a sample of boards through bare to confirm that we have a bad batch. Even if we see no failures on the bare boards, we'l

Cleanliness test

Electronics Forum | Thu Jan 02 12:15:10 EST 2003 | Mike Konrad

Richard, With respect to the Resistivity of Solvent Extract (ROSE) test, the test solution is exceptionally aggressive. With the Zero-Ion for example, the test solution�s resistivity is 150 M-Ohms. Additionally, because test solution is made up of

Cleanliness test

Electronics Forum | Thu Jan 02 11:35:30 EST 2003 | Richard

Cleanliness test � �Area Grid Arrays�. Evaluation of residues� resistivity in a specific location on the board. (As compared to �Solvent Extract� evaluation.) We are: SMT assembly, using standard �water soluble� process with micro BGAs (example: C

electrical test

Electronics Forum | Thu Jul 27 16:06:18 EDT 2006 | chrisgriffin

You will have to be more specific about your boards and process to get any help. There are many different types of in circuit tests and functional tests throughout the manufacturing process. The nature of these tests depend on board function. Sinc

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