Electronics Forum | Tue Jul 31 22:06:12 EDT 2007 | davef
We had no problems reflowing an assembly on Bergquist Thermal Clad. The assembly was small. So, we built it on a 8-up fixture. It stayed in the fixture from screen print, through pick and place, and into reflow. When the fixture came out of the r
Electronics Forum | Tue Sep 04 10:48:49 EDT 2007 | lloyd
How do other people check their solder joint strength after a process change? For example, say you are getting wetting problems and you feel that a change to the reflow profile may help, or perhaps a slight change to the stencil aperture to reduce so
Electronics Forum | Fri Nov 02 08:10:40 EDT 2007 | floydf
Has anyone ever looked into the possibility for > laser marking 1812 size X7R ceramic chip > capacitors injecting sufficient energy to cause > cracking when voltage is applied? If so, what > were the findings? We are having failures of > caps
Electronics Forum | Thu Nov 08 16:02:28 EST 2007 | ck_the_flip
We've got lots of connectors at my place of employment like this. What I do is... I run these "slower than molasses in January" - we're talkin' 2 Ft/Min. conveyor speeds. Obviously this will have an effect on your thermal profile so compensate acco
Electronics Forum | Mon Nov 12 09:22:41 EST 2007 | devajj
BTW, The surrounded QFN fine pitch terminals > should have the normal aperture reduction of 7 % > in case of RoHS Senju solder paste. This works > for our Telecom customer. > > The vias in the > ground pad will be somewhat filled with solder >
Electronics Forum | Tue Dec 18 10:08:16 EST 2007 | bbarton
Drill a hole through the board (or the BGA) and set a thermocouple into the center of the device (in the X Y and Z dimensions) and run your profiler through the oven until you get the temp you need in the center of the BGA. Attach a second thermocoup
Electronics Forum | Wed Dec 19 20:42:55 EST 2007 | davef
gersla: You're correct that carriers of low temperature material will disfigure and become useless at 125*C bake temperatures. The reason you can not find 70*C bake data is: J-STD033B, "4.2.2 Low Temperature Carriers. SMD packages shipped in low tem
Electronics Forum | Fri Jan 04 09:44:59 EST 2008 | philkaz
Hello, I am Philip Kazmierowicz and I work with KIC, a Thermal Profiling company. We have done many lifetime experiments on Printed Circuit Boards over the years. The key thing to understand is that if the primary material of the board in FR4 fiber
Electronics Forum | Sun Feb 10 20:27:50 EST 2008 | jmelson
As long as it doesn't have a thermal pad soldered under the package, it shouldn't be a big problem. Small, pointed iron, stereo zoom microscope if you can find one, or a head-mounted magnifier. Lots of light. Rest the heel of your hand on the boar
Electronics Forum | Tue Feb 12 17:57:42 EST 2008 | chef
I must ask the silly question- are you sure you deposited the correct amount of paste? Depending on aperature design-the voiding could come from a stencil that has its holes partially built up with old paste. If paste volume is guaranteed, then what
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