Electronics Forum | Tue Apr 10 11:39:29 EDT 2001 | brownsj
One of the reasons for a grainy joint is the cooling of the joint after reflow. Check your reflow profile, not just the preheating and reflow section but also the cooling zones. It works the same way as molten rock. If it cools slowly you get pumice
Electronics Forum | Thu Apr 12 00:43:38 EDT 2001 | zam_bri
Can anybody gimme some input on the problem I faced currently on 0402 Chip Resistor. At pre-reflow the component are placed nicely but at post reflow, we found the Resistor stands sideway ( both termination, the pad and componant are in contact, fun
Electronics Forum | Thu Apr 12 01:23:04 EDT 2001 | Eric C
Check the pad size. I had this issue before due to the pad size too wide. R&D had change the size of the pad and is solve the issue. Before the pad size change, I had rebuild another stencil with the pad opening close to the component size. It won't
Electronics Forum | Fri Apr 13 10:08:48 EDT 2001 | gcs
dgrenier is on the right track. We are a volume shop and with a up back stencil you can keep CFM line going with no down time. DMPO also at our shop have inproved. We also use AOI equipemnt as a process indicator to monitor when stenicls need to be c
Electronics Forum | Tue Apr 17 09:53:57 EDT 2001 | edylc
Hi Thrasher7, We called it wash boards, any misprint from screen printer was at tight control ..and those wash boards when being flow down to the line have an identifier /marker , is a matter on isolation of the problem..... But I still can't think
Electronics Forum | Tue Apr 17 21:30:27 EDT 2001 | davef
The issue is on the table. Which is it? Are you ... * Loosing your gold plate when you remove the tape? [A tape test is a standard test for evaluating gold fingers. Check IPC-TM-650, test number wachacallit. Checkitaut.] OR * Putting tape o
Electronics Forum | Sat Apr 14 03:34:23 EDT 2001 | kpliew
Hi Greg, If u don't mind my recommendations. U may want to try to convince them that by using smaller pad size , u save solder paste in the end of the day (provided u are doing mass volumes). It is another way of getting around to ur idea of changin
Electronics Forum | Sat Apr 14 03:25:04 EDT 2001 | kpliew
Hi , As far as I experienced with wave reflow. If u have a refective thermal reader , u will see that the board is exposed to much more temp than the 120 deg that u set. Actually , once u see the board warp or comp. crack u should know that
Electronics Forum | Sat Apr 14 03:25:10 EDT 2001 | kpliew
Hi , As far as I experienced with wave reflow. If u have a refective thermal reader , u will see that the board is exposed to much more temp than the 120 deg that u set. Actually , once u see the board warp or comp. crack u should know that
Electronics Forum | Mon Apr 16 12:59:51 EDT 2001 | Mike R
If you will place a temperature strip on the board during wave soldering process you will get a max of 210 F or 98.8 C which is normal on the standard wave temperature. The problem on the 10% solder on the TH via hole can be caused by insufficient fl
